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/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/glint/glint_regs.h,v 1.31 2001/12/08 16:01:52 alanh Exp $ */

/*
 * glint register file
 *
 * Copyright by Stefan Dirsch, Dirk Hohndel, Alan Hourihane
 * Authors: Alan Hourihane, <alanh@fairlite.demon.co.uk>
 *          Dirk Hohndel, <hohndel@suse.de>
 *          Stefan Dirsch, <sndirsch@suse.de>
 *          Simon P., <sim@suse.de>
 *
 * this work is sponsored by S.u.S.E. GmbH, Fuerth, Elsa GmbH, Aachen and
 * Siemens Nixdorf Informationssysteme
 *
 */

#ifndef MPLAYER_GLINT_REGS_H
#define MPLAYER_GLINT_REGS_H

/**********************************************
*  GLINT 500TX Configuration Region Registers *
***********************************************/

/* Device Identification */
#define CFGVendorId						0x0000
#define PCI_VENDOR_3DLABS					0x3D3D
#define PCI_VENDOR_TI						0x104C
#define CFGDeviceId						0x0002

#define CFGRevisionId						0x08
#define CFGClassCode						0x09
#define CFGHeaderType						0x0E

/* Device Control/Status */
#define CFGCommand							0x04
#define CFGStatus							0x06

/* Miscellaneous Functions */
#define CFGBist								0x0f
#define CFGLatTimer							0x0d
#define CFGCacheLine							0x0c
#define CFGMaxLat							0x3f
#define CFGMinGrant							0x3e
#define CFGIntPin							0x3d
#define CFGIntLine							0x3c

/* Base Adresses */
#define CFGBaseAddr0							0x10
#define CFGBaseAddr1							0x14
#define CFGBaseAddr2							0x18
#define CFGBaseAddr3							0x1C
#define CFGBaseAddr4							0x20
#define CFGRomAddr							0x30



/**********************************
 * GLINT 500TX Region 0 Registers *
 **********************************/

/* Control Status Registers */
#define ResetStatus							0x0000
#define IntEnable							0x0008
#define IntFlags							0x0010
#define InFIFOSpace							0x0018
#define OutFIFOWords							0x0020
#define DMAAddress							0x0028
#define DMACount							0x0030
#define ErrorFlags							0x0038
#define VClkCtl								0x0040
#define TestRegister							0x0048
#define Aperture0							0x0050
#define Aperture1							0x0058
#define DMAControl							0x0060
#define FIFODis								0x0068

/* GLINT PerMedia Region 0 additional Registers */
#define ChipConfig							0x0070
#define   SCLK_SEL_MASK		(3 << 10)
#define   SCLK_SEL_MCLK_HALF	(3 << 10)
#define ByDMAControl							0x00D8

/* GLINT 500TX LocalBuffer Registers */
#define LBMemoryCtl							0x1000
#define   LBNumBanksMask	0x00000001
#define    LBNumBanks1		(0)
#define    LBNumBanks2		(1)
#define   LBPageSizeMask        0x00000006
#define    LBPageSize256	(0<<1)
#define    LBPageSize512	(1<<1)
#define    LBPageSize1024	(2<<1)
#define    LBPageSize2048	(3<<1)
#define   LBRASCASLowMask	0x00000018
#define    LBRASCASLow2		(0<<3)
#define    LBRASCASLow3		(1<<3)
#define    LBRASCASLow4		(2<<3)
#define    LBRASCASLow5		(3<<3)
#define   LBRASPrechargeMask	0x00000060
#define    LBRASPrecharge2	(0<<5)
#define    LBRASPrecharge3	(1<<5)
#define    LBRASPrecharge4	(2<<5)
#define    LBRASPrecharge5	(3<<5)
#define   LBCASLowMask		0x00000180
#define    LBCASLow1		(0<<7)
#define    LBCASLow2		(1<<7)
#define    LBCASLow3		(2<<7)
#define    LBCASLow4		(3<<7)
#define   LBPageModeMask	0x00000200
#define    LBPageModeEnabled	(0<<9)
#define    LBPageModeDisabled	(1<<9)
#define   LBRefreshCountMask    0x0003fc00
#define   LBRefreshCountShift   10

#define LBMemoryEDO							0x1008
#define   LBEDOMask		0x00000001
#define    LBEDODisabled	(0)
#define    LBEDOEnabled		(1)
#define   LBEDOBankSizeMask	0x0000000e
#define    LBEDOBankSizeDiabled	(0<<1)
#define    LBEDOBankSize256K	(1<<1)
#define    LBEDOBankSize512K	(2<<1)
#define    LBEDOBankSize1M	(3<<1)
#define    LBEDOBankSize2M	(4<<1)
#define    LBEDOBankSize4M	(5<<1)
#define    LBEDOBankSize8M	(6<<1)
#define    LBEDOBankSize16M	(7<<1)
#define   LBTwoPageDetectorMask	0x00000010
#define    LBSinglePageDetector	(0<<4)
#define    LBTwoPageDetector	(1<<4)

/* GLINT PerMedia Memory Control Registers */
#define PMReboot							0x1000
#define PMRomControl							0x1040
#define PMBootAddress							0x1080
#define PMMemConfig							0x10C0
    #define RowCharge8    1 << 10
    #define TimeRCD8      1 <<  7
    #define TimeRC8       0x6 << 3
    #define TimeRP8       1
    #define CAS3Latency8  0 << 16
    #define BootAdress8   0x10
    #define NumberBanks8  0x3 << 29
    #define RefreshCount8 0x41 << 21
    #define TimeRASMin8   1 << 13
    #define DeadCycle8    1 << 17
    #define BankDelay8    0 << 18
    #define Burst1Cycle8  1 << 31
    #define SDRAM8        0 << 4

    #define RowCharge6    1 << 10
    #define TimeRCD6      1 <<  7
    #define TimeRC6       0x6 << 3
    #define TimeRP6       0x2
    #define CAS3Latency6  1 << 16
    #define BootAdress6   0x60
    #define NumberBanks6  0x2 << 29
    #define RefreshCount6 0x41 << 21
    #define TimeRASMin6   1 << 13
    #define DeadCycle6    1 << 17
    #define BankDelay6    0 << 18
    #define Burst1Cycle6  1 << 31
    #define SDRAM6        0 << 4

    #define RowCharge4    0 << 10
    #define TimeRCD4      0 <<  7
    #define TimeRC4       0x4 << 3
    #define TimeRP4       1
    #define CAS3Latency4  0 << 16
    #define BootAdress4   0x10
    #define NumberBanks4  1 << 29
    #define RefreshCount4 0x30 << 21
    #define TimeRASMin4   1 << 13
    #define DeadCycle4    0 << 17
    #define BankDelay4    0 << 18
    #define Burst1Cycle4  1 << 31
    #define SDRAM4        0 << 4

/* Permedia 2 Control */
#define MemControl							0x1040

#define PMBypassWriteMask						0x1100
#define PMFramebufferWriteMask					        0x1140
#define PMCount								0x1180

/* Framebuffer Registers */
#define FBMemoryCtl							0x1800
#define FBModeSel							0x1808
#define FBGCWrMask							0x1810
#define FBGCColorLower							0x1818
#define FBTXMemCtl							0x1820
#define FBWrMaskk							0x1830
#define FBGCColorUpper							0x1838

/* Core FIFO */
#define OutputFIFO							0x2000

/* 500TX Internal Video Registers */
#define VTGHLimit							0x3000
#define VTGHSyncStart							0x3008
#define VTGHSyncEnd							0x3010
#define VTGHBlankEnd							0x3018
#define VTGVLimit							0x3020
#define VTGVSyncStart							0x3028
#define VTGVSyncEnd							0x3030
#define VTGVBlankEnd							0x3038
#define VTGHGateStart							0x3040
#define VTGHGateEnd							0x3048
#define VTGVGateStart							0x3050
#define VTGVGateEnd							0x3058
#define VTGPolarity							0x3060
#define VTGFrameRowAddr							0x3068
#define VTGVLineNumber							0x3070
#define VTGSerialClk							0x3078
#define VTGModeCtl							0x3080

/* Permedia Video Control Registers */
#define PMScreenBase							0x3000
#define PMScreenStride							0x3008
#define PMHTotal							0x3010
#define PMHgEnd								0x3018
#define PMHbEnd								0x3020
#define PMHsStart							0x3028
#define PMHsEnd								0x3030
#define PMVTotal							0x3038
#define PMVbEnd								0x3040
#define PMVsStart							0x3048
#define PMVsEnd								0x3050
#define PMVideoControl							0x3058
#define PMInterruptLine							0x3060
#define PMDDCData							0x3068
#define   DataIn             						(1<<0)
#define   ClkIn              						(1<<1)
#define   DataOut            						(1<<2)
#define   ClkOut             						(1<<3)
#define PMLineCount							0x3070
#define PMFifoControl							0x3078

/* Permedia 2 RAMDAC Registers */
#define PM2DACWriteAddress						0x4000
#define PM2DACIndexReg							0x4000
#define PM2DACData							0x4008
#define PM2DACReadMask							0x4010
#define PM2DACReadAddress						0x4018
#define PM2DACCursorColorAddress				        0x4020
#define PM2DACCursorColorData					        0x4028
#define PM2DACIndexData							0x4050
#define PM2DACCursorData						0x4058
#define PM2DACCursorXLsb						0x4060
#define PM2DACCursorXMsb						0x4068
#define PM2DACCursorYLsb						0x4070
#define PM2DACCursorYMsb						0x4078
#define PM2DACCursorControl						0x06
#define PM2DACIndexCMR							0x18
#define   PM2DAC_TRUECOLOR				0x80
#define   PM2DAC_RGB					0x20
#define   PM2DAC_GRAPHICS				0x10
#define   PM2DAC_PACKED					0x09
#define   PM2DAC_8888					0x08
#define   PM2DAC_565					0x06
#define   PM2DAC_4444					0x05
#define   PM2DAC_5551					0x04
#define   PM2DAC_2321					0x03
#define   PM2DAC_2320					0x02
#define   PM2DAC_332					0x01
#define   PM2DAC_CI8					0x00
#define PM2DACIndexMDCR							0x19
#define PM2DACIndexPalettePage					        0x1c
#define PM2DACIndexMCR							0x1e
#define PM2DACIndexClockAM						0x20
#define PM2DACIndexClockAN						0x21
#define PM2DACIndexClockAP						0x22
#define PM2DACIndexClockBM						0x23
#define PM2DACIndexClockBN						0x24
#define PM2DACIndexClockBP						0x25
#define PM2DACIndexClockCM						0x26
#define PM2DACIndexClockCN						0x27
#define PM2DACIndexClockCP						0x28
#define PM2DACIndexClockStatus						0x29
#define PM2DACIndexMemClockM						0x30
#define PM2DACIndexMemClockN						0x31
#define PM2DACIndexMemClockP						0x32
#define PM2DACIndexMemClockStatus					0x33
#define PM2DACIndexColorKeyControl					0x40
#define PM2DACIndexColorKeyOverlay					0x41
#define PM2DACIndexColorKeyRed						0x42
#define PM2DACIndexColorKeyGreen					0x43
#define PM2DACIndexColorKeyBlue						0x44

/* Permedia 2V extensions */
#define PM2VDACRDMiscControl						0x000
#define PM2VDACRDSyncControl						0x001
#define PM2VDACRDDACControl						0x002
#define PM2VDACRDPixelSize						0x003
#define PM2VDACRDColorFormat						0x004
#define PM2VDACRDCursorMode						0x005
#define PM2VDACRDCursorXLow						0x007
#define PM2VDACRDCursorXHigh						0x008
#define PM2VDACRDCursorYLow						0x009
#define PM2VDACRDCursorYHigh						0x00A
#define PM2VDACRDCursorHotSpotX						0x00B
#define PM2VDACRDCursorHotSpotY						0x00C
#define PM2VDACRDOverlayKey						0x00D
#define PM2VDACRDPan							0x00E
#define PM2VDACRDSense							0x00F
#define PM2VDACRDCheckControl						0x018
#define PM2VDACIndexClockControl					0x200
#define PM2VDACRDDClk0PreScale						0x201
#define PM2VDACRDDClk0FeedbackScale					0x202
#define PM2VDACRDDClk0PostScale						0x203
#define PM2VDACRDDClk1PreScale						0x204
#define PM2VDACRDDClk1FeedbackScale					0x205
#define PM2VDACRDDClk1PostScale						0x206
#define PM2VDACRDMClkControl						0x20D
#define PM2VDACRDMClkPreScale						0x20E
#define PM2VDACRDMClkFeedbackScale					0x20F
#define PM2VDACRDMClkPostScale						0x210
#define PM2VDACRDCursorPalette						0x303
#define PM2VDACRDCursorPattern						0x400
#define PM2VDACIndexRegLow						0x4020
#define PM2VDACIndexRegHigh						0x4028
#define PM2VDACIndexData						0x4030
#define PM2VDACRDIndexControl						0x4038

/* Permedia 2 Video Streams Unit Registers */
#define   VSBIntFlag            					(1<<8)
#define   VSAIntFlag            					(1<<9)

#define VSConfiguration							0x5800
#define   VS_UnitMode_ROM						0
#define   VS_UnitMode_AB8						3
#define   VS_UnitMode_Mask						7
#define   VS_GPBusMode_A        					(1<<3)
#define   VS_HRefPolarityA      					(1<<9)
#define   VS_VRefPolarityA      					(1<<10)
#define   VS_VActivePolarityA   					(1<<11)
#define   VS_UseFieldA          					(1<<12)
#define   VS_FieldPolarityA						(1<<13)
#define   VS_FieldEdgeA         					(1<<14)
#define   VS_VActiveVBIA						(1<<15)
#define   VS_InterlaceA         					(1<<16)
#define   VS_ReverseDataA       					(1<<17)
#define   VS_HRefPolarityB      					(1<<18)
#define   VS_VRefPolarityB      					(1<<19)
#define   VS_VActivePolarityB   					(1<<20)
#define   VS_UseFieldB							(1<<21)
#define   VS_FieldPolarityB						(1<<22)
#define   VS_FieldEdgeB							(1<<23)
#define   VS_VActiveVBIB						(1<<24)
#define   VS_InterlaceB							(1<<25)
#define   VS_ColorSpaceB_RGB						(1<<26)
#define   VS_ReverseDataB						(1<<27)
#define   VS_DoubleEdgeB						(1<<28)

#define VSStatus							0x5808
#define   VS_FieldOne0A							(1<<9)
#define   VS_FieldOne1A							(1<<10)
#define   VS_FieldOne2A							(1<<11)
#define   VS_InvalidInterlaceA						(1<<12)
#define   VS_FieldOne0B							(1<<17)
#define   VS_FieldOne1B							(1<<18)
#define   VS_FieldOne2B							(1<<19)
#define   VS_InvalidInterlaceB						(1<<20)

#define VSSerialBusControl						0x5810

#define VSABase          						0x5900
#define   VSA_Video             					(1<<0)
#define   VSA_VBI               					(1<<1)
#define   VSA_BufferCtl         					(1<<2)
#define   VSA_MirrorX           					(1<<7)
#define   VSA_MirrorY           					(1<<8)
#define   VSA_Discard_None      					(0<<9)
#define   VSA_Discard_FieldOne  					(1<<9)
#define   VSA_Discard_FieldTwo  					(2<<9)
#define   VSA_CombineFields     					(1<<11)
#define   VSA_LockToStreamB     					(1<<12)
#define VSBBase								0x5A00
#define   VSB_Video             					(1<<0)
#define   VSB_VBI               					(1<<1)
#define   VSB_BufferCtl         					(1<<2)
#define   VSB_CombineFields     					(1<<3)
#define   VSB_RGBOrder          					(1<<11)
#define   VSB_GammaCorrect      					(1<<12)
#define   VSB_LockToStreamA     					(1<<13)

#define VSControl							0x0000
#define VSInterrupt            						0x0008
#define VSCurrentLine          						0x0010
#define VSVideoAddressHost     						0x0018
#define VSVideoAddressIndex    						0x0020
#define VSVideoAddress0        						0x0028
#define VSVideoAddress1        						0x0030
#define VSVideoAddress2        						0x0038
#define VSVideoStride          						0x0040
#define VSVideoStartLine       						0x0048
#define VSVideoEndLine     						0x0050
#define VSVideoStartData       						0x0058
#define VSVideoEndData         						0x0060
#define VSVBIAddressHost       						0x0068
#define VSVBIAddressIndex      						0x0070
#define VSVBIAddress0          						0x0078
#define VSVBIAddress1          						0x0080
#define VSVBIAddress2          						0x0088
#define VSVBIStride            						0x0090
#define VSVBIStartLine         						0x0098
#define VSVBIEndLine           						0x00A0
#define VSVBIStartData         						0x00A8
#define VSVBIEndData           						0x00B0
#define VSFifoControl          						0x00B8

/**********************************
 * GLINT Delta Region 0 Registers *
 **********************************/

/* Control Status Registers */
#define DResetStatus							0x0800
#define DIntEnable							0x0808
#define DIntFlags							0x0810
#define DErrorFlags							0x0838
#define DTestRegister							0x0848
#define DFIFODis							0x0868



/**********************************
 * GLINT Gamma Region 0 Registers *
 **********************************/

/* Control Status Registers */
#define GInFIFOSpace							0x0018
#define GDMAAddress							0x0028
#define GDMACount							0x0030
#define GDMAControl							0x0060
#define GOutDMA								0x0080
#define GOutDMACount							0x0088
#define GResetStatus							0x0800
#define GIntEnable							0x0808
#define GIntFlags							0x0810
#define GErrorFlags							0x0838
#define GTestRegister							0x0848
#define GFIFODis							0x0868

#define GChipConfig							0x0870
#define   GChipAGPCapable		1 << 0
#define   GChipAGPSideband		1 << 1
#define   GChipMultiGLINTApMask		3 << 19
#define   GChipMultiGLINTA