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| author | nick <nick@b3059339-0415-0410-9bf9-f77b7e298cf2> | 2002-02-09 15:14:48 +0000 |
|---|---|---|
| committer | nick <nick@b3059339-0415-0410-9bf9-f77b7e298cf2> | 2002-02-09 15:14:48 +0000 |
| commit | 78e63e9314cfbdd5c9bc6c694c84df43db8e6098 (patch) | |
| tree | 9c6e69ddd27e00c2cdcabccefdd6f051d8378179 /vidix | |
| parent | 8fd226919d4bb1a706688c61d7f4d5be62eab5dd (diff) | |
| download | mpv-78e63e9314cfbdd5c9bc6c694c84df43db8e6098.tar.bz2 mpv-78e63e9314cfbdd5c9bc6c694c84df43db8e6098.tar.xz | |
Get(Set) deinterlacing
git-svn-id: svn://svn.mplayerhq.hu/mplayer/trunk@4612 b3059339-0415-0410-9bf9-f77b7e298cf2
Diffstat (limited to 'vidix')
| -rw-r--r-- | vidix/drivers/radeon_vid.c | 50 |
1 files changed, 49 insertions, 1 deletions
diff --git a/vidix/drivers/radeon_vid.c b/vidix/drivers/radeon_vid.c index 983afd212e..5bf20ee233 100644 --- a/vidix/drivers/radeon_vid.c +++ b/vidix/drivers/radeon_vid.c @@ -782,7 +782,7 @@ static void radeon_vid_display_video( void ) OUTREG(OV0_AUTO_FLIP_CNTL,(INREG(OV0_AUTO_FLIP_CNTL)^OV0_AUTO_FLIP_CNTL_SOFT_EOF_TOGGLE)); OUTREG(OV0_AUTO_FLIP_CNTL,(INREG(OV0_AUTO_FLIP_CNTL)^OV0_AUTO_FLIP_CNTL_SOFT_EOF_TOGGLE)); - OUTREG(OV0_DEINTERLACE_PATTERN,besr.deinterlace_pattern); + if(besr.deinterlace_on) OUTREG(OV0_DEINTERLACE_PATTERN,besr.deinterlace_pattern); #ifdef RAGE128 OUTREG(OV0_COLOUR_CNTL, (besr.brightness & 0x7f) | (besr.saturation << 8) | @@ -1223,3 +1223,51 @@ int vixPlaybackSetEq( const vidix_video_eq_t * eq) return 0; } +int vixPlaybackSetDeint( const vidix_deinterlace_t * info) +{ + unsigned sflg; + switch(info->flags) + { + default: + case CFG_NON_INTERLACED: + besr.deinterlace_on = 0; + break; + case CFG_EVEN_ODD_INTERLACING: + case CFG_INTERLACED: + besr.deinterlace_on = 1; + besr.deinterlace_pattern = 0x900AAAAA; + break; + case CFG_ODD_EVEN_INTERLACING: + besr.deinterlace_on = 1; + besr.deinterlace_pattern = 0x00055555; + break; + case CFG_UNIQUE_INTERLACING: + besr.deinterlace_on = 1; + besr.deinterlace_pattern = info->deinterlace_pattern; + break; + } + OUTREG(OV0_REG_LOAD_CNTL, REG_LD_CTL_LOCK); + radeon_engine_idle(); + while(!(INREG(OV0_REG_LOAD_CNTL)®_LD_CTL_LOCK_READBACK)); + radeon_fifo_wait(15); + sflg = INREG(OV0_SCALE_CNTL); + if(besr.deinterlace_on) + { + OUTREG(OV0_SCALE_CNTL,sflg | SCALER_ADAPTIVE_DEINT); + OUTREG(OV0_DEINTERLACE_PATTERN,besr.deinterlace_pattern); + } + else OUTREG(OV0_SCALE_CNTL,sflg & (~SCALER_ADAPTIVE_DEINT)); + OUTREG(OV0_REG_LOAD_CNTL, 0); + return 0; +} + +int vixPlaybackGetDeint( vidix_deinterlace_t * info) +{ + if(!besr.deinterlace_on) info->flags = CFG_NON_INTERLACED; + else + { + info->flags = CFG_UNIQUE_INTERLACING; + info->deinterlace_pattern = besr.deinterlace_pattern; + } + return 0; +} |