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| author | lumag <lumag@b3059339-0415-0410-9bf9-f77b7e298cf2> | 2003-10-01 21:03:00 +0000 |
|---|---|---|
| committer | lumag <lumag@b3059339-0415-0410-9bf9-f77b7e298cf2> | 2003-10-01 21:03:00 +0000 |
| commit | 64b4914893dafa8b7c4dddbb2c2fd7e264feda2a (patch) | |
| tree | fb6560c36a7a540c7b3263dd3924a1d7e1ebb39f /vidix | |
| parent | 457debb6f18fb1464968fd940ed00162f6cc497d (diff) | |
| download | mpv-64b4914893dafa8b7c4dddbb2c2fd7e264feda2a.tar.bz2 mpv-64b4914893dafa8b7c4dddbb2c2fd7e264feda2a.tar.xz | |
Sometimes (especially with big images) reading pitch 0 from card's register
returns 0 (probably due to full card's FIFO), which leads to SIGFPE later.
Fixed (or workarounded) by rereading pitch0, until it's not zero.
git-svn-id: svn://svn.mplayerhq.hu/mplayer/trunk@10971 b3059339-0415-0410-9bf9-f77b7e298cf2
Diffstat (limited to 'vidix')
| -rw-r--r-- | vidix/drivers/nvidia_vid.c | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/vidix/drivers/nvidia_vid.c b/vidix/drivers/nvidia_vid.c index fcac88bb93..826d0ca035 100644 --- a/vidix/drivers/nvidia_vid.c +++ b/vidix/drivers/nvidia_vid.c @@ -419,6 +419,7 @@ void rivatv_overlay_start (struct rivatv_info *info,int bufno){ /*update depth & dimensions here because it may change with vo vesa or vo fbdev*/ info->chip.lock (&info->chip, 0); + do { switch (info->chip.arch) { case NV_ARCH_03: pitch0 = info->chip.PGRAPH[0x00000650/4]; @@ -430,6 +431,9 @@ void rivatv_overlay_start (struct rivatv_info *info,int bufno){ pitch0 = info->chip.PGRAPH[0x00000670/4]; break; } + if (pitch0 == 0) + printf("[nvidia_vid]: pitch0 = 0!!! Rereading\n"); + } while (pitch0 == 0); VID_WR08(info->chip.PCIO, 0x03D4, 0x28); bpp = VID_RD08(info->chip.PCIO,0x03D5); if(bpp==3)bpp = 4; //fixme do nvidia cards support 24bpp? @@ -438,7 +442,7 @@ void rivatv_overlay_start (struct rivatv_info *info,int bufno){ if(!bpp)printf("[nvidia_vid] error invalid bpp\n"); else { -// printf("[nvidia_vid] video mode: %ux%u@%u\n",screen_x = pitch0/bpp,(pitch0/bpp*3)/4,info->depth); +// printf("[nvidia_vid] video mode: %ux%u@%u\n",info->screen_x = pitch0/bpp,(pitch0/bpp*3)/4,info->depth); info->screen_x = pitch0/bpp; } @@ -673,6 +677,7 @@ int vixInit(void){ { uint32_t bpp=0,pitch0=0; info->chip.lock (&info->chip, 0); + do { switch (info->chip.arch) { case NV_ARCH_03: pitch0 = info->chip.PGRAPH[0x00000650/4]; @@ -684,6 +689,9 @@ int vixInit(void){ pitch0 = info->chip.PGRAPH[0x00000670/4]; break; } + if (pitch0 == 0) + printf("[nvidia_vid]: pitch0 = 0!!! Rereading\n"); + } while (pitch0 == 0); VID_WR08(info->chip.PCIO, 0x03D4, 0x28); bpp = VID_RD08(info->chip.PCIO,0x03D5); if(bpp==3)bpp = 4; //fixme do nvidia cards support 24bpp? |