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| author | ben <ben@b3059339-0415-0410-9bf9-f77b7e298cf2> | 2007-09-15 18:42:26 +0000 |
|---|---|---|
| committer | ben <ben@b3059339-0415-0410-9bf9-f77b7e298cf2> | 2007-09-15 18:42:26 +0000 |
| commit | 25d3363a96d976a9d476933667f36b68e9f60054 (patch) | |
| tree | 95ad3b933d8eb1f7bbe14e50b3be80c4cbf1e833 /vidix | |
| parent | 21038d9e708e7b6c3d0dd0b266130f5984c3033c (diff) | |
| download | mpv-25d3363a96d976a9d476933667f36b68e9f60054.tar.bz2 mpv-25d3363a96d976a9d476933667f36b68e9f60054.tar.xz | |
fix screen width and height calculation on nvidia vidix (patch by Guillaume Lecerf (fox at geexbox dot org)
git-svn-id: svn://svn.mplayerhq.hu/mplayer/trunk@24536 b3059339-0415-0410-9bf9-f77b7e298cf2
Diffstat (limited to 'vidix')
| -rw-r--r-- | vidix/nvidia_vid.c | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/vidix/nvidia_vid.c b/vidix/nvidia_vid.c index 94443a8921..cd928bd133 100644 --- a/vidix/nvidia_vid.c +++ b/vidix/nvidia_vid.c @@ -658,7 +658,11 @@ static void nv_getscreenproperties(struct rivatv_info *info){ else info->depth = 0x04 << bpp; /*get screen width*/ VID_WR08(info->chip.PCIO, 0x03D4, 0x1); - info->screen_x = (1 + VID_RD08(info->chip.PCIO, 0x3D5)) * 8; + info->screen_x = VID_RD08(info->chip.PCIO, 0x3D5); + /* NV_PCRTC_HORIZ_EXTRA_DISPLAY_END_8 */ + VID_WR08 (info->chip.PCIO, 0x3D4, 0x2D); + info->screen_x |= (VID_RD08 (info->chip.PCIO, 0x3D5) & 0x02) << 7; + info->screen_x = (info->screen_x + 1) << 3; /*get screen height*/ /* get first 8 bits in VT_DISPLAY_END*/ VID_WR08(info->chip.PCIO, 0x03D4, 0x12); @@ -669,6 +673,12 @@ static void nv_getscreenproperties(struct rivatv_info *info){ /* and the 10th in CRTC_OVERFLOW*/ info->screen_y |=(VID_RD08(info->chip.PCIO,0x03D5) &0x40)<<3; ++info->screen_y; + /* NV_PCRTC_EXTRA_VERT_DISPLAY_END_10 */ + VID_WR08(info->chip.PCIO,0x03D4,0x25); + info->screen_y |= (VID_RD08(info->chip.PCIO,0x03D5) &0x02)<<9; + /* NV_PCRTC_???_VERT_DISPLAY_END_11 */ + VID_WR08(info->chip.PCIO,0x03D4,0x41); + info->screen_y |= (VID_RD08(info->chip.PCIO,0x03D5) &0x04)<<9; /* NV_PCRTC_OFFSET */ VID_WR08 (info->chip.PCIO, 0x3D4, 0x13); |