summaryrefslogtreecommitdiffstats
path: root/mp3lib/decode_k7.s
blob: 1de23093f7cfdd05f7603c61afb892ebbd0bfdcb (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
///
/// Replacement of synth_1to1() with AMD's 3DNowEx(DSP)! SIMD operations support
///
/// This code based 'decode_3dnow.s' by Syuuhei Kashiyama
/// <squash@mb.kcom.ne.jp>,only some types of changes have been made:
///
///  - Added new opcode PFNACC
///  - decreased number of opcodes (as it was suggested by k7 manual)
///    (using memory reference as operand of instructions)
///  - change function name for support 3DNowEx! automatic detect
///
/// note: because K7 processors are an aggresive out-of-order three-way
///       superscalar ones instruction order is not significand for them.
///
/// Modified by Nick Kurshev <nickols_k@mail.ru>
///
/ synth_1to1_3dnow works the same way as the c version of
/ synth_1to1. this assembler code based 'decode-i586.s'
/ (by Stefan Bieschewski <stb@acm.org>), two types of changes
/ have been made:
/ - use {MMX,3DNow!} instruction for reduce cpu
/ - remove unused(?) local symbols
/
/ useful sources of information on optimizing 3DNow! code include:
/ AMD 3DNow! Technology Manual (Publication #21928)
/     English:  http://www.amd.com/K6/k6docs/pdf/21928d.pdf
/    (Japanese: http://www.amd.com/japan/K6/k6docs/j21928c.pdf)
/ AMD-K6-2 Processor Code Optimization Application Note (Publication #21924)
/     English:  http://www.amd.com/K6/k6docs/pdf/21924b.pdf
/
/ This code was tested only AMD-K6-2 processor Linux systems,
/ please tell me:
/ - whether this code works on other 3DNow! capable processors
/  (ex.IDT-C6-2) or not
/ - whether this code works on other OSes or not
/
/ by KIMURA Takuhiro <kim@hannah.ipc.miyakyo-u.ac.jp> - until 31.Mar.1998
/                    <kim@comtec.co.jp>               - after  1.Apr.1998

/ Enhancments for q-word operation by Michael Hipp

.bss
        .comm   buffs,4352,4
.data
        .align 4
bo:
        .long 1
.text
/* int synth_1to1(real *bandPtr,int channel,unsigned char *out) */
.globl synth_1to1_3dnowex
synth_1to1_3dnowex:
        subl  $12,%esp
        pushl %ebp
        pushl %edi
        pushl %esi
        pushl %ebx
	
        movl  32(%esp),%eax
        movl  40(%esp),%esi
        movl  $0,%edi
        movl  bo,%ebp
        cmpl  %edi,36(%esp)
        jne   .L48
        decl  %ebp
        andl  $15,%ebp
        movl  %ebp,bo
        movl  $buffs,%ecx
        jmp   .L49
.L48:
        addl  $2,%esi
        movl  $buffs+2176,%ecx
.L49:
        testl $1,%ebp
        je    .L50
        movl  %ecx,%ebx
        movl  %ebp,16(%esp)
        pushl %eax
        movl  20(%esp),%edx
        leal  (%ebx,%edx,4),%eax
        pushl %eax
        movl  24(%esp),%eax
        incl  %eax
        andl  $15,%eax
        leal  1088(,%eax,4),%eax
        addl  %ebx,%eax
        jmp   .L74
.L50:
        leal  1088(%ecx),%ebx
        leal  1(%ebp),%edx
        movl  %edx,16(%esp)
        pushl %eax
        leal  1092(%ecx,%ebp,4),%eax
        pushl %eax
        leal  (%ecx,%ebp,4),%eax
.L74:
        pushl %eax
        call  dct64_3dnowex
        movl  16(%esp),%edx
        leal  0(,%edx,4),%edx
        movl  $decwin+64,%eax
        movl  %eax,%ecx            
        subl  %edx,%ecx
        movl  $16,%ebp

.L55:

        movq  (%ecx),%mm0
        pfmul (%ebx),%mm0

        movq  8(%ecx),%mm1
        pfmul 8(%ebx),%mm1
        pfadd %mm1,%mm0

        movq  16(%ebx),%mm2
        pfmul 16(%ecx),%mm2
        pfadd %mm2,%mm0

        movq  24(%ecx),%mm3
        pfmul 24(%ebx),%mm3
        pfadd %mm3,%mm0

        movq  32(%ebx),%mm4
        pfmul 32(%ecx),%mm4
        pfadd %mm4,%mm0

        movq  40(%ecx),%mm5
        pfmul 40(%ebx),%mm5
	pfadd %mm5,%mm0

        movq  48(%ebx),%mm6
        pfmul 48(%ecx),%mm6
        pfadd %mm6,%mm0

        movq  56(%ecx),%mm7
        pfmul 56(%ebx),%mm7
        pfadd %mm7,%mm0

	pfnacc %mm0, %mm0

        pf2id %mm0,%mm0
        movd  %mm0,%eax

        sar   $16,%eax
        movw  %ax,(%esi)

        addl  $64,%ebx
        subl  $-128,%ecx
        addl  $4,%esi
        decl  %ebp
        jnz  .L55

/ --- end of  loop 1 ---

        movd  (%ecx),%mm0
        pfmul (%ebx),%mm0

        movd  8(%ebx),%mm1
        pfmul 8(%ecx),%mm1
        pfadd %mm1,%mm0

        movd  16(%ebx),%mm2
        pfmul 16(%ecx),%mm2
        pfadd %mm2,%mm0

        movd  24(%ebx),%mm3
        pfmul 24(%ecx),%mm3
        pfadd %mm3,%mm0

        movd  32(%ebx),%mm4
        pfmul 32(%ecx),%mm4
        pfadd %mm4,%mm0

        movd  40(%ebx),%mm5
        pfmul 40(%ecx),%mm5
        pfadd %mm5,%mm0

        movd  48(%ebx),%mm6
        pfmul 48(%ecx),%mm6
        pfadd %mm6,%mm0

        movd  56(%ebx),%mm7
        pfmul 56(%ecx),%mm7
        pfadd %mm7,%mm0

        pf2id %mm0,%mm0
        movd  %mm0,%eax

        sar   $16,%eax

        movw  %ax,(%esi)

        addl  $-64,%ebx
        addl  $4,%esi
        addl  $256,%ecx
        movl  $15,%ebp

.L68:
	pxor  %mm0, %mm0

        movq  (%ecx),%mm1
        pfmul (%ebx),%mm1
        pfsub %mm1,%mm0

        movq  8(%ecx),%mm2
        pfmul 8(%ebx),%mm2
        pfsub %mm2,%mm0

        movq  16(%ecx),%mm3
        pfmul 16(%ebx),%mm3
        pfsub %mm3,%mm0

        movq  24(%ecx),%mm4
        pfmul 24(%ebx),%mm4
        pfsub %mm4,%mm0

        movq  32(%ecx),%mm5
        pfmul 32(%ebx),%mm5
        pfsub %mm5,%mm0

        movq  40(%ecx),%mm6
        pfmul 40(%ebx),%mm6
        pfsub %mm6,%mm0

        movq  48(%ecx),%mm7
        pfmul 48(%ebx),%mm7
        pfsub %mm7,%mm0

        movq  56(%ecx),%mm1
        pfmul 56(%ebx),%mm1
        pfsub %mm1,%mm0

        pfacc %mm0,%mm0

        pf2id %mm0,%mm0
        movd  %mm0,%eax

        sar   $16,%eax

        movw  %ax,(%esi)

        addl  $-64,%ebx
        subl  $-128,%ecx
        addl  $4,%esi
        decl  %ebp
        jnz   .L68

/ --- end of loop 2

        femms

        movl  %edi,%eax
        popl  %ebx
        popl  %esi
        popl  %edi
        popl  %ebp
        addl  $12,%esp
        ret