From 9b7f5e81c685e0bfdac857fbda10d922c967df94 Mon Sep 17 00:00:00 2001 From: diego Date: Sun, 1 Apr 2007 00:02:43 +0000 Subject: Move driver files directly into the vidix directory. git-svn-id: svn://svn.mplayerhq.hu/mplayer/trunk@22868 b3059339-0415-0410-9bf9-f77b7e298cf2 --- vidix/Makefile | 13 +- vidix/cyberblade_regs.h | 136 +++ vidix/cyberblade_vid.c | 647 ++++++++++ vidix/drivers/cyberblade_regs.h | 136 --- vidix/drivers/cyberblade_vid.c | 647 ---------- vidix/drivers/mach64.h | 2481 --------------------------------------- vidix/drivers/mach64_vid.c | 1066 ----------------- vidix/drivers/mga_vid.c | 1508 ------------------------ vidix/drivers/nvidia_vid.c | 935 --------------- vidix/drivers/pm3_regs.h | 1113 ------------------ vidix/drivers/pm3_vid.c | 375 ------ vidix/drivers/radeon.h | 2156 ---------------------------------- vidix/drivers/radeon_vid.c | 2101 --------------------------------- vidix/drivers/savage_regs.h | 303 ----- vidix/drivers/savage_vid.c | 1475 ----------------------- vidix/drivers/sis_bridge.c | 827 ------------- vidix/drivers/sis_defs.h | 106 -- vidix/drivers/sis_regs.h | 412 ------- vidix/drivers/sis_vid.c | 1560 ------------------------ vidix/drivers/unichrome_regs.h | 635 ---------- vidix/drivers/unichrome_vid.c | 976 --------------- vidix/mach64.h | 2481 +++++++++++++++++++++++++++++++++++++++ vidix/mach64_vid.c | 1066 +++++++++++++++++ vidix/mga_vid.c | 1508 ++++++++++++++++++++++++ vidix/nvidia_vid.c | 935 +++++++++++++++ vidix/pm3_regs.h | 1113 ++++++++++++++++++ vidix/pm3_vid.c | 375 ++++++ vidix/radeon.h | 2156 ++++++++++++++++++++++++++++++++++ vidix/radeon_vid.c | 2101 +++++++++++++++++++++++++++++++++ vidix/savage_regs.h | 303 +++++ vidix/savage_vid.c | 1475 +++++++++++++++++++++++ vidix/sis_bridge.c | 827 +++++++++++++ vidix/sis_defs.h | 106 ++ vidix/sis_regs.h | 412 +++++++ vidix/sis_vid.c | 1560 ++++++++++++++++++++++++ vidix/unichrome_regs.h | 635 ++++++++++ vidix/unichrome_vid.c | 976 +++++++++++++++ 37 files changed, 18817 insertions(+), 18820 deletions(-) create mode 100644 vidix/cyberblade_regs.h create mode 100644 vidix/cyberblade_vid.c delete mode 100644 vidix/drivers/cyberblade_regs.h delete mode 100644 vidix/drivers/cyberblade_vid.c delete mode 100644 vidix/drivers/mach64.h delete mode 100644 vidix/drivers/mach64_vid.c delete mode 100644 vidix/drivers/mga_vid.c delete mode 100644 vidix/drivers/nvidia_vid.c delete mode 100644 vidix/drivers/pm3_regs.h delete mode 100644 vidix/drivers/pm3_vid.c delete mode 100644 vidix/drivers/radeon.h delete mode 100644 vidix/drivers/radeon_vid.c delete mode 100644 vidix/drivers/savage_regs.h delete mode 100644 vidix/drivers/savage_vid.c delete mode 100644 vidix/drivers/sis_bridge.c delete mode 100644 vidix/drivers/sis_defs.h delete mode 100644 vidix/drivers/sis_regs.h delete mode 100644 vidix/drivers/sis_vid.c delete mode 100644 vidix/drivers/unichrome_regs.h delete mode 100644 vidix/drivers/unichrome_vid.c create mode 100644 vidix/mach64.h create mode 100644 vidix/mach64_vid.c create mode 100644 vidix/mga_vid.c create mode 100644 vidix/nvidia_vid.c create mode 100644 vidix/pm3_regs.h create mode 100644 vidix/pm3_vid.c create mode 100644 vidix/radeon.h create mode 100644 vidix/radeon_vid.c create mode 100644 vidix/savage_regs.h create mode 100644 vidix/savage_vid.c create mode 100644 vidix/sis_bridge.c create mode 100644 vidix/sis_defs.h create mode 100644 vidix/sis_regs.h create mode 100644 vidix/sis_vid.c create mode 100644 vidix/unichrome_regs.h create mode 100644 vidix/unichrome_vid.c (limited to 'vidix') diff --git a/vidix/Makefile b/vidix/Makefile index 0ee4a8875d..b05b3b4fe2 100644 --- a/vidix/Makefile +++ b/vidix/Makefile @@ -3,18 +3,15 @@ include ../config.mak LIBNAME_MPLAYER = libvidix.a SRCS_MPLAYER = vidixlib.c \ - $(wildcard drivers/*.c) + $(wildcard *.c) -OBJS_MPLAYER = drivers/mga_crtc2_vid.o \ - drivers/rage128_vid.o \ +OBJS_MPLAYER = mga_crtc2_vid.o \ + rage128_vid.o \ include ../mpcommon.mak -drivers/mga_crtc2_vid.o: drivers/mga_vid.c +mga_crtc2_vid.o: mga_vid.c $(CC) -c $(CFLAGS) -DCRTC2 -o $@ $< -drivers/rage128_vid.o: drivers/radeon_vid.c +rage128_vid.o: radeon_vid.c $(CC) -c $(CFLAGS) -DRAGE128 -o $@ $< - -clean:: - rm -f drivers/*.o drivers/*~ diff --git a/vidix/cyberblade_regs.h b/vidix/cyberblade_regs.h new file mode 100644 index 0000000000..049fde6aa5 --- /dev/null +++ b/vidix/cyberblade_regs.h @@ -0,0 +1,136 @@ +/* + * Copyright 1992-2000 by Alan Hourihane, Wigan, England. + * + * Permission to use, copy, modify, distribute, and sell this software and its + * documentation for any purpose is hereby granted without fee, provided that + * the above copyright notice appear in all copies and that both that + * copyright notice and this permission notice appear in supporting + * documentation, and that the name of Alan Hourihane not be used in + * advertising or publicity pertaining to distribution of the software without + * specific, written prior permission. Alan Hourihane makes no representations + * about the suitability of this software for any purpose. It is provided + * "as is" without express or implied warranty. + * + * ALAN HOURIHANE DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, + * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO + * EVENT SHALL ALAN HOURIHANE BE LIABLE FOR ANY SPECIAL, INDIRECT OR + * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, + * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER + * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR + * PERFORMANCE OF THIS SOFTWARE. + * + * Author: Alan Hourihane, alanh@fairlite.demon.co.uk + */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/trident/trident_regs.h,v 1.22 2002/01/11 13:06:30 alanh Exp $ */ + +#define DEBUG 1 + +#define NTSC 14.31818 +#define PAL 17.73448 + +/* General Registers */ +#define SPR 0x1F /* Software Programming Register (videoram) */ + +/* 3C4 */ +#define RevisionID 0x09 +#define ConfPort1 0x0C +#define ConfPort2 0x0C +#define NewMode2 0x0D +#define OldMode2 0x00 /* Should be 0x0D - dealt with in trident_dac.c */ +#define OldMode1 0x0E +#define NewMode1 0x0E +#define Protection 0x11 +#define MCLKLow 0x16 +#define MCLKHigh 0x17 +#define ClockLow 0x18 +#define ClockHigh 0x19 +#define SSetup 0x20 +#define SKey 0x37 +#define SPKey 0x57 + +/* 3x4 */ +#define Offset 0x13 +#define Underline 0x14 +#define CRTCMode 0x17 +#define CRTCModuleTest 0x1E +#define FIFOControl 0x20 +#define LinearAddReg 0x21 +#define DRAMTiming 0x23 +#define New32 0x23 +#define RAMDACTiming 0x25 +#define CRTHiOrd 0x27 +#define AddColReg 0x29 +#define InterfaceSel 0x2A +#define HorizOverflow 0x2B +#define GETest 0x2D +#define Performance 0x2F +#define GraphEngReg 0x36 +#define I2C 0x37 +#define PixelBusReg 0x38 +#define PCIReg 0x39 +#define DRAMControl 0x3A +#define MiscContReg 0x3C +#define CursorXLow 0x40 +#define CursorXHigh 0x41 +#define CursorYLow 0x42 +#define CursorYHigh 0x43 +#define CursorLocLow 0x44 +#define CursorLocHigh 0x45 +#define CursorXOffset 0x46 +#define CursorYOffset 0x47 +#define CursorFG1 0x48 +#define CursorFG2 0x49 +#define CursorFG3 0x4A +#define CursorFG4 0x4B +#define CursorBG1 0x4C +#define CursorBG2 0x4D +#define CursorBG3 0x4E +#define CursorBG4 0x4F +#define CursorControl 0x50 +#define PCIRetry 0x55 +#define PreEndControl 0x56 +#define PreEndFetch 0x57 +#define PCIMaster 0x60 +#define Enhancement0 0x62 +#define NewEDO 0x64 + +/* --- Additions by AMR for Vidix support --- */ +#define VideoWin1_HScale 0x80 +#define VideoWin1_VScale 0x82 +#define VideoWin1_Start 0x86 +#define VideoWin1_Stop 0x8a +#define Video_Flags 0x8e +#define VideoWin1_Y_BPR 0x90 +#define VideoWin1_Y_Offset 0x92 +#define Video_LineBufferThreshold 0x95 +#define Video_LineBufferLevel 0x96 +#define Video_Flags2 0x97 +/* --- */ + +#define TVinterface 0xC0 +#define TVMode 0xC1 +#define ClockControl 0xCF + + +/* 3CE */ +#define MiscExtFunc 0x0F +#define MiscIntContReg 0x2F +#define CyberControl 0x30 +#define CyberEnhance 0x31 +#define FPConfig 0x33 +#define VertStretch 0x52 +#define HorStretch 0x53 +#define BiosMode 0x5c +#define BiosNewMode1 0x5a +#define BiosNewMode2 0x5c +#define BiosReg 0x5d + +/* --- IO Macros by AMR --- */ + +#define CRINB(reg) (OUTPORT8(0x3d4,reg), INPORT8(0x3d5)) +#define SRINB(reg) (OUTPORT8(0x3c4,reg), INPORT8(0x3c5)) +#define CROUTB(reg,val) (OUTPORT8(0x3d4,reg), OUTPORT8(0x3d5,val)) +#define SROUTB(reg,val) (OUTPORT8(0x3c4,reg), OUTPORT8(0x3c5,val)) + +/* --- */ + diff --git a/vidix/cyberblade_vid.c b/vidix/cyberblade_vid.c new file mode 100644 index 0000000000..3da2f4db2e --- /dev/null +++ b/vidix/cyberblade_vid.c @@ -0,0 +1,647 @@ +/* + Driver for CyberBlade/i1 - Version 0.1.4 + + Copyright (C) 2002 by Alastair M. Robinson. + Official homepage: http://www.blackfiveservices.co.uk/EPIAVidix.shtml + + Based on Permedia 3 driver by Måns Rullgård + + Thanks to Gilles Frattini for bugfixes + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + + Changes: + 18/01/03 + MMIO is no longer used, sidestepping cache issues on EPIA-800 + TV-Out modes are now better supported - this should be the end + of the magenta stripes :) + Brightness/Contrast controls disabled for the time being - they were + seriously degrading picture quality, especially with TV-Out. + + To Do: + Implement Hue/Saturation controls + Support / Test multiple frames + Test colour-key code more extensively +*/ + +#include +#include +#include +#include +#include +#include + +#include "vidix.h" +#include "fourcc.h" +#include "../libdha/libdha.h" +#include "../libdha/pci_ids.h" +#include "../libdha/pci_names.h" +#include "../config.h" + +#include "cyberblade_regs.h" + +pciinfo_t pci_info; + +char save_colourkey[6]; +char *cyberblade_mem; + +#ifdef DEBUG_LOGFILE +FILE *logfile=0; +#define LOGWRITE(x) {if(logfile) fprintf(logfile,x);} +#else +#define LOGWRITE(x) +#endif + +/* Helper functions for reading registers. */ + +static int CRINW(int reg) +{ + int result; + result=CRINB(reg); + result|=CRINB(reg+1)<<8; + return(result); +} + +static void CROUTW(int reg,int val) +{ + CROUTB(reg,val&255); + CROUTB(reg+1,(val>>8)&255); +} + +static int SRINW(int reg) +{ + int result; + result=SRINB(reg); + result|=SRINB(reg+1)<<8; + return(result); +} + +static void SROUTW(int reg,int val) +{ + SROUTB(reg,val&255); + SROUTB(reg+1,(val>>8)&255); +} + +void DumpRegisters(void) +{ + int reg,val; +#ifdef DEBUG_LOGFILE + if(logfile) + { + LOGWRITE("CRTC Register Dump:\n") + for(reg=0;reg<256;++reg) + { + val=CRINB(reg); + fprintf(logfile,"CR0x%2x: 0x%2x\n",reg,val); + } + LOGWRITE("SR Register Dump:\n") + for(reg=0;reg<256;++reg) + { + val=SRINB(reg); + fprintf(logfile,"SR0x%2x: 0x%2x\n",reg,val); + } + } +#endif +} +/* --- */ + +static vidix_capability_t cyberblade_cap = +{ + "Trident CyberBlade i1 driver", + "Alastair M. Robinson ", + TYPE_OUTPUT, + { 0, 0, 0, 0 }, + 1024, + 1024, + 4, + 4, + -1, + FLAG_UPSCALER|FLAG_DOWNSCALER, + VENDOR_TRIDENT, + -1, + { 0, 0, 0, 0 } +}; + + +unsigned int vixGetVersion(void) +{ + return(VIDIX_VERSION); +} + + +static unsigned short cyberblade_card_ids[] = +{ + DEVICE_TRIDENT_CYBERBLADE_I7, + DEVICE_TRIDENT_CYBERBLADE_I7D, + DEVICE_TRIDENT_CYBERBLADE_I1, + DEVICE_TRIDENT_CYBERBLADE_I12, + DEVICE_TRIDENT_CYBERBLADE_I13, + DEVICE_TRIDENT_CYBERBLADE_XPAI1 +}; + + +static int find_chip(unsigned chip_id) +{ + unsigned i; + for(i = 0;i < sizeof(cyberblade_card_ids)/sizeof(unsigned short);i++) + { + if(chip_id == cyberblade_card_ids[i]) return i; + } + return -1; +} + +int vixProbe(int verbose, int force) +{ + pciinfo_t lst[MAX_PCI_DEVICES]; + unsigned i,num_pci; + int err; + err = pci_scan(lst,&num_pci); + if(err) + { + printf("[cyberblade] Error occurred during pci scan: %s\n",strerror(err)); + return err; + } + else + { + err = ENXIO; + for(i=0; i < num_pci; i++) + { + if(lst[i].vendor == VENDOR_TRIDENT) + { + int idx; + const char *dname; + idx = find_chip(lst[i].device); + if(idx == -1) + continue; + dname = pci_device_name(VENDOR_TRIDENT, lst[i].device); + dname = dname ? dname : "Unknown chip"; + printf("[cyberblade] Found chip: %s\n", dname); + if ((lst[i].command & PCI_COMMAND_IO) == 0) + { + printf("[cyberblade] Device is disabled, ignoring\n"); + continue; + } + cyberblade_cap.device_id = lst[i].device; + err = 0; + memcpy(&pci_info, &lst[i], sizeof(pciinfo_t)); + break; + } + } + } + + if(err && verbose) printf("[cyberblade] Can't find chip\n"); + return err; +} + + +int vixInit(void) +{ + cyberblade_mem = map_phys_mem(pci_info.base0, 0x800000); + enable_app_io(); + save_colourkey[0]=SRINB(0x50); + save_colourkey[1]=SRINB(0x51); + save_colourkey[2]=SRINB(0x52); + save_colourkey[3]=SRINB(0x54); + save_colourkey[4]=SRINB(0x55); + save_colourkey[5]=SRINB(0x56); +#ifdef DEBUG_LOGFILE + logfile=fopen("/tmp/cyberblade_vidix.log","w"); +#endif + return 0; +} + +void vixDestroy(void) +{ + int protect; +#ifdef DEBUG_LOGFILE + if(logfile) + fclose(logfile); +#endif + protect=SRINB(0x11); + SROUTB(0x11, 0x92); + CROUTB(0x8E, 0xc4); /* Disable overlay */ + SROUTB(0x50,save_colourkey[0]); + SROUTB(0x51,save_colourkey[1]); + SROUTB(0x52,save_colourkey[2]); + SROUTB(0x54,save_colourkey[3]); + SROUTB(0x55,save_colourkey[4]); + SROUTB(0x56,save_colourkey[5]); + SROUTB(0x11, protect); + disable_app_io(); + unmap_phys_mem(cyberblade_mem, 0x800000); +} + + +int vixGetCapability(vidix_capability_t *to) +{ + memcpy(to, &cyberblade_cap, sizeof(vidix_capability_t)); + return 0; +} + + +static int is_supported_fourcc(uint32_t fourcc) +{ + switch(fourcc) + { + case IMGFMT_YUY2: + case IMGFMT_YV12: + case IMGFMT_I420: + case IMGFMT_YVU9: + case IMGFMT_BGR16: + return 1; + default: + return 0; + } +} + +int vixQueryFourcc(vidix_fourcc_t *to) +{ + if(is_supported_fourcc(to->fourcc)) + { + to->depth = VID_DEPTH_1BPP | VID_DEPTH_2BPP | + VID_DEPTH_4BPP | VID_DEPTH_8BPP | + VID_DEPTH_12BPP| VID_DEPTH_15BPP| + VID_DEPTH_16BPP| VID_DEPTH_24BPP| + VID_DEPTH_32BPP; + to->flags = VID_CAP_EXPAND | VID_CAP_SHRINK | VID_CAP_COLORKEY; + return 0; + } + else + to->depth = to->flags = 0; + return ENOSYS; +} + + +static int frames[VID_PLAY_MAXFRAMES]; + +static vidix_grkey_t cyberblade_grkey; + +int vixGetGrKeys(vidix_grkey_t *grkey) +{ + memcpy(grkey, &cyberblade_grkey, sizeof(vidix_grkey_t)); + return(0); +} + +int vixSetGrKeys(const vidix_grkey_t *grkey) +{ + int pixfmt=CRINB(0x38); + int protect; + memcpy(&cyberblade_grkey, grkey, sizeof(vidix_grkey_t)); + + protect=SRINB(0x11); + SROUTB(0x11, 0x92); + + if(pixfmt&0x28) /* 32 or 24 bpp */ + { + SROUTB(0x50, cyberblade_grkey.ckey.blue); /* Colour Key */ + SROUTB(0x51, cyberblade_grkey.ckey.green); /* Colour Key */ + SROUTB(0x52, cyberblade_grkey.ckey.red); /* Colour Key */ + SROUTB(0x54, 0xff); /* Colour Key Mask */ + SROUTB(0x55, 0xff); /* Colour Key Mask */ + SROUTB(0x56, 0xff); /* Colour Key Mask */ + } + else + { + int tmp=((cyberblade_grkey.ckey.blue & 0xF8)>>3) + | ((cyberblade_grkey.ckey.green & 0xfc)<<3) + | ((cyberblade_grkey.ckey.red & 0xf8)<<8); + SROUTB(0x50, tmp&0xff); /* Colour Key */ + SROUTB(0x51, (tmp>>8)&0xff); /* Colour Key */ + SROUTB(0x52, 0); /* Colour Key */ + SROUTB(0x54, 0xff); /* Colour Key Mask */ + SROUTB(0x55, 0xff); /* Colour Key Mask */ + SROUTB(0x56, 0x00); /* Colour Key Mask */ + } + SROUTB(0x11,protect); + return(0); +} + + +vidix_video_eq_t equal = +{ + VEQ_CAP_BRIGHTNESS | VEQ_CAP_SATURATION | VEQ_CAP_HUE, + 300, 100, 0, 0, 0, 0, 0, 0 +}; + +int vixPlaybackGetEq( vidix_video_eq_t * eq) +{ + memcpy(eq,&equal,sizeof(vidix_video_eq_t)); + return 0; +} + +int vixPlaybackSetEq( const vidix_video_eq_t * eq) +{ + int br,sat,cr,protect; + if(eq->cap & VEQ_CAP_BRIGHTNESS) equal.brightness = eq->brightness; + if(eq->cap & VEQ_CAP_CONTRAST) equal.contrast = eq->contrast; + if(eq->cap & VEQ_CAP_SATURATION) equal.saturation = eq->saturation; + if(eq->cap & VEQ_CAP_HUE) equal.hue = eq->hue; + if(eq->cap & VEQ_CAP_RGB_INTENSITY) + { + equal.red_intensity = eq->red_intensity; + equal.green_intensity = eq->green_intensity; + equal.blue_intensity = eq->blue_intensity; + } + equal.flags = eq->flags; + + cr = (equal.contrast) * 31 / 2000; cr+=16; + if (cr < 0) cr = 0; if(cr > 7) cr = 7; + cr=cr<<4 | cr; + + br = (equal.brightness+1000) * 63 / 2000; + if (br < 0) br = 0; if(br > 63) br = 63; + if(br>32) br-=32; else br+=32; + + sat = (equal.saturation + 1000) * 16 / 2000; + if (sat < 0) sat = 0; if(sat > 31) sat = 31; + + protect=SRINB(0x11); + SROUTB(0x11, 0x92); + + SROUTB(0xBC,cr); + SROUTW(0xB0,(br<<10)|4); + + SROUTB(0x11, protect); + + return 0; +} + + +static int YOffs,UOffs,VOffs; + +int vixConfigPlayback(vidix_playback_t *info) +{ + int shrink, zoom; + int src_w, drw_w; + int src_h, drw_h; + int hscale,vscale; + long base0; + int y_pitch, uv_pitch; + int protect=0; + int layout=0; + unsigned int i; + + if(!is_supported_fourcc(info->fourcc)) + return -1; + + src_w = info->src.w; + src_h = info->src.h; + + drw_w = info->dest.w; + drw_h = info->dest.h; + + switch(info->fourcc) + { + case IMGFMT_YUY2: + case IMGFMT_BGR16: + y_pitch = (src_w*2 + 15) & ~15; + uv_pitch = 0; + YOffs=VOffs=UOffs=info->offset.y = info->offset.v = info->offset.u = 0; + info->frame_size = y_pitch*src_h; + layout=0x0; /* packed */ + break; + case IMGFMT_YV12: + case IMGFMT_I420: + y_pitch = (src_w+15) & ~15; + uv_pitch = ((src_w/2)+7) & ~7; + YOffs=info->offset.y = 0; + VOffs=info->offset.v = y_pitch*src_h; + UOffs=info->offset.u = info->offset.v+(uv_pitch)*(src_h/2); + info->frame_size = y_pitch*src_h + 2*uv_pitch*(src_h/2); + layout=0x1; /* planar, 4:1:1 */ + break; + case IMGFMT_YVU9: + y_pitch = (src_w+15) & ~15; + uv_pitch = ((src_w/4)+3) & ~3; + YOffs=info->offset.y = 0; + VOffs=info->offset.v = y_pitch*src_h; + UOffs=info->offset.u = info->offset.v+(uv_pitch)*(src_h/4); + info->frame_size = y_pitch*src_h + 2*uv_pitch*(src_h/4); + layout=0x51; /* planar, 16:1:1 */ + break; + } + + /* Assume we have 2 MB to play with */ + info->num_frames = 0x200000 / info->frame_size; + if(info->num_frames > VID_PLAY_MAXFRAMES) + info->num_frames = VID_PLAY_MAXFRAMES; + + /* Start at 6 MB. Let's hope it's not in use. */ + base0 = 0x600000; + info->dga_addr = cyberblade_mem + base0; + + info->dest.pitch.y = 16; + info->dest.pitch.u = 16; + info->dest.pitch.v = 16; + + for(i = 0; i < info->num_frames; i++) + { + info->offsets[i] = info->frame_size * i; + frames[i] = base0+info->offsets[i]; + } + + OUTPORT8(0x3d4,0x39); + OUTPORT8(0x3d5,INPORT(0x3d5)|1); + + SRINB(0x0b); /* Select new mode */ + + /* Unprotect hardware registers... */ + protect=SRINB(0x11); + SROUTB(0x11, 0x92); + + SROUTB(0x57, 0xc0); /* Playback key function */ + SROUTB(0x21, 0x34); /* Signature control */ + SROUTB(0x37, 0x30); /* Video key mode */ + + vixSetGrKeys(&cyberblade_grkey); + + /* compute_scale_factor(&src_w, &drw_w, &shrink, &zoom); */ + { + int HTotal,VTotal,HSync,VSync,Overflow,HDisp,VDisp; + int HWinStart,VWinStart; + int tx1,ty1,tx2,ty2; + + HTotal=CRINB(0x00); + HSync=CRINB(0x04); + VTotal=CRINB(0x06); + VSync=CRINB(0x10); + Overflow=CRINB(0x07); + HTotal <<=3; + HSync <<=3; + VTotal |= (Overflow & 1) <<8; + VTotal |= (Overflow & 0x20) <<4; + VTotal +=4; + VSync |= (Overflow & 4) <<6; + VSync |= (Overflow & 0x80) <<2; + + if(CRINB(0xd1)&0x80) + { + int TVHTotal,TVVTotal,TVHSyncStart,TVVSyncStart,TVOverflow; + LOGWRITE("[cyberblade] Using TV-CRTC\n"); + + HDisp=(1+CRINB(0x01))*8; + VDisp=1+CRINB(0x12); + Overflow=CRINB(0x07); + VDisp |= (Overflow & 2) <<7; + VDisp |= (Overflow & 0x40) << 3; + + TVHTotal=CRINB(0xe0)*8; + TVVTotal=CRINB(0xe6); + TVOverflow=CRINB(0xe7); + if(TVOverflow&0x20) TVVTotal|=512; + if(TVOverflow&0x01) TVVTotal|=256; + TVHTotal+=40; TVVTotal+=2; + + TVHSyncStart=CRINB(0xe4)*8; + TVVSyncStart=CRINB(0xf0); + if(TVOverflow&0x80) TVVSyncStart|=512; + if(TVOverflow&0x04) TVVSyncStart|=256; + + HWinStart=(TVHTotal-HDisp)&15; + HWinStart|=(HTotal-HDisp)&15; + HWinStart+=(TVHTotal-TVHSyncStart)-49; + } + else + { + LOGWRITE("[cyberblade] Using Standard CRTC\n"); + HWinStart=(HTotal-HSync)+15; + } + VWinStart=(VTotal-VSync)-8; + + printf("[cyberblade] HTotal: 0x%x, HSStart: 0x%x\n",HTotal,HSync); + printf(" VTotal: 0x%x, VStart: 0x%x\n",VTotal,VSync); + tx1=HWinStart+info->dest.x; + ty1=VWinStart+info->dest.y; + tx2=tx1+info->dest.w; + ty2=ty1+info->dest.h; + + CROUTW(0x86,tx1); + CROUTW(0x88,ty1); + CROUTW(0x8a,tx2); + CROUTW(0x8c,ty2+3); + } + + if(src_w==drw_w) + hscale=0; + else if(src_w> 2; + CROUTB(0x95, ((lb & 0x100)>>1) | 0x08 ); /* Linebuffer level bit 8 & threshold */ + CROUTB(0x96, (lb & 0xFF)); /* Linebuffer level */ + + CROUTB(0x97, 0x00); /* VDE Flags */ + CROUTB(0xBA, 0x00); /* Chroma key */ + CROUTB(0xBB, 0x00); /* Chroma key */ + CROUTB(0xBC, 0xFF); /* Chroma key */ + CROUTB(0xBD, 0xFF); /* Chroma key */ + CROUTB(0xBE, 0x04); /* Capture control */ + + if(src_w > 384) + layout|=4; /* 2x line buffers */ + SROUTB(0x97, layout); + + CROUTW(0x90,y_pitch); /* Y Bytes per row */ + SROUTW(0x9A,uv_pitch); /* UV Bytes per row */ + + switch(info->fourcc) + { + case IMGFMT_BGR16: + CROUTB(0x8F, 0x24); /* VDE Flags - Edge Recovery & CSC Bypass */ + CROUTB(0xBF, 0x02); /* Video format - RGB16 */ + SROUTB(0xBE, 0x0); /* HSCB disabled */ + break; + default: + CROUTB(0x8F, 0x20); /* VDE Flags - Edge Recovery */ + CROUTB(0xBF, 0x00); /* Video format - YUV */ + SROUTB(0xBE, 0x00); /* HSCB disable - was 0x03*/ + break; + } + + CROUTB(0x92, ((base0+info->offset.y) >> 3) &0xff); /* Lower 8 bits of start address */ + CROUTB(0x93, ((base0+info->offset.y) >> 11) &0xff); /* Mid 8 bits of start address */ + CROUTB(0x94, ((base0+info->offset.y) >> 19) &0xf); /* Upper 4 bits of start address */ + SROUTB(0x80, ((base0+info->offset.v) >> 3) &0xff); /* Lower 8 bits of start address */ + SROUTB(0x81, ((base0+info->offset.v) >> 11) &0xff); /* Mid 8 bits of start address */ + SROUTB(0x82, ((base0+info->offset.v) >> 19) &0xf); /* Upper 4 bits of start address */ + SROUTB(0x83, ((base0+info->offset.u) >> 3) &0xff); /* Lower 8 bits of start address */ + SROUTB(0x84, ((base0+info->offset.u) >> 11) &0xff); /* Mid 8 bits of start address */ + SROUTB(0x85, ((base0+info->offset.u) >> 19) &0xf); /* Upper 4 bits of start address */ + } + + vixPlaybackSetEq(&equal); + + /* Protect hardware registers again */ + SROUTB(0x11, protect); + return 0; +} + + +int vixPlaybackOn(void) +{ + LOGWRITE("Enable overlay\n"); + CROUTB(0x8E, 0xd4); /* VDE Flags*/ + + return 0; +} + + +int vixPlaybackOff(void) +{ + LOGWRITE("Disable overlay\n"); + CROUTB(0x8E, 0xc4); /* VDE Flags*/ + + return 0; +} + + +int vixPlaybackFrameSelect(unsigned int frame) +{ + int protect; + LOGWRITE("Frame select\n"); + protect=SRINB(0x11); + SROUTB(0x11, 0x92); + /* Set overlay address to that of selected frame */ + CROUTB(0x92, ((frames[frame]+YOffs) >> 3) &0xff); /* Lower 8 bits of start address */ + CROUTB(0x93, ((frames[frame]+YOffs) >> 11) &0xff); /* Mid 8 bits of start address */ + CROUTB(0x94, ((frames[frame]+YOffs) >> 19) &0xf); /* Upper 4 bits of start address */ + SROUTB(0x80, ((frames[frame]+VOffs) >> 3) &0xff); /* Lower 8 bits of start address */ + SROUTB(0x81, ((frames[frame]+VOffs) >> 11) &0xff); /* Mid 8 bits of start address */ + SROUTB(0x82, ((frames[frame]+VOffs) >> 19) &0xf); /* Upper 4 bits of start address */ + SROUTB(0x83, ((frames[frame]+UOffs) >> 3) &0xff); /* Lower 8 bits of start address */ + SROUTB(0x84, ((frames[frame]+UOffs) >> 11) &0xff); /* Mid 8 bits of start address */ + SROUTB(0x85, ((frames[frame]+UOffs) >> 19) &0xf); /* Upper 4 bits of start address */ + SROUTB(0x11, protect); + return 0; +} + + diff --git a/vidix/drivers/cyberblade_regs.h b/vidix/drivers/cyberblade_regs.h deleted file mode 100644 index 049fde6aa5..0000000000 --- a/vidix/drivers/cyberblade_regs.h +++ /dev/null @@ -1,136 +0,0 @@ -/* - * Copyright 1992-2000 by Alan Hourihane, Wigan, England. - * - * Permission to use, copy, modify, distribute, and sell this software and its - * documentation for any purpose is hereby granted without fee, provided that - * the above copyright notice appear in all copies and that both that - * copyright notice and this permission notice appear in supporting - * documentation, and that the name of Alan Hourihane not be used in - * advertising or publicity pertaining to distribution of the software without - * specific, written prior permission. Alan Hourihane makes no representations - * about the suitability of this software for any purpose. It is provided - * "as is" without express or implied warranty. - * - * ALAN HOURIHANE DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, - * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO - * EVENT SHALL ALAN HOURIHANE BE LIABLE FOR ANY SPECIAL, INDIRECT OR - * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, - * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER - * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR - * PERFORMANCE OF THIS SOFTWARE. - * - * Author: Alan Hourihane, alanh@fairlite.demon.co.uk - */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/trident/trident_regs.h,v 1.22 2002/01/11 13:06:30 alanh Exp $ */ - -#define DEBUG 1 - -#define NTSC 14.31818 -#define PAL 17.73448 - -/* General Registers */ -#define SPR 0x1F /* Software Programming Register (videoram) */ - -/* 3C4 */ -#define RevisionID 0x09 -#define ConfPort1 0x0C -#define ConfPort2 0x0C -#define NewMode2 0x0D -#define OldMode2 0x00 /* Should be 0x0D - dealt with in trident_dac.c */ -#define OldMode1 0x0E -#define NewMode1 0x0E -#define Protection 0x11 -#define MCLKLow 0x16 -#define MCLKHigh 0x17 -#define ClockLow 0x18 -#define ClockHigh 0x19 -#define SSetup 0x20 -#define SKey 0x37 -#define SPKey 0x57 - -/* 3x4 */ -#define Offset 0x13 -#define Underline 0x14 -#define CRTCMode 0x17 -#define CRTCModuleTest 0x1E -#define FIFOControl 0x20 -#define LinearAddReg 0x21 -#define DRAMTiming 0x23 -#define New32 0x23 -#define RAMDACTiming 0x25 -#define CRTHiOrd 0x27 -#define AddColReg 0x29 -#define InterfaceSel 0x2A -#define HorizOverflow 0x2B -#define GETest 0x2D -#define Performance 0x2F -#define GraphEngReg 0x36 -#define I2C 0x37 -#define PixelBusReg 0x38 -#define PCIReg 0x39 -#define DRAMControl 0x3A -#define MiscContReg 0x3C -#define CursorXLow 0x40 -#define CursorXHigh 0x41 -#define CursorYLow 0x42 -#define CursorYHigh 0x43 -#define CursorLocLow 0x44 -#define CursorLocHigh 0x45 -#define CursorXOffset 0x46 -#define CursorYOffset 0x47 -#define CursorFG1 0x48 -#define CursorFG2 0x49 -#define CursorFG3 0x4A -#define CursorFG4 0x4B -#define CursorBG1 0x4C -#define CursorBG2 0x4D -#define CursorBG3 0x4E -#define CursorBG4 0x4F -#define CursorControl 0x50 -#define PCIRetry 0x55 -#define PreEndControl 0x56 -#define PreEndFetch 0x57 -#define PCIMaster 0x60 -#define Enhancement0 0x62 -#define NewEDO 0x64 - -/* --- Additions by AMR for Vidix support --- */ -#define VideoWin1_HScale 0x80 -#define VideoWin1_VScale 0x82 -#define VideoWin1_Start 0x86 -#define VideoWin1_Stop 0x8a -#define Video_Flags 0x8e -#define VideoWin1_Y_BPR 0x90 -#define VideoWin1_Y_Offset 0x92 -#define Video_LineBufferThreshold 0x95 -#define Video_LineBufferLevel 0x96 -#define Video_Flags2 0x97 -/* --- */ - -#define TVinterface 0xC0 -#define TVMode 0xC1 -#define ClockControl 0xCF - - -/* 3CE */ -#define MiscExtFunc 0x0F -#define MiscIntContReg 0x2F -#define CyberControl 0x30 -#define CyberEnhance 0x31 -#define FPConfig 0x33 -#define VertStretch 0x52 -#define HorStretch 0x53 -#define BiosMode 0x5c -#define BiosNewMode1 0x5a -#define BiosNewMode2 0x5c -#define BiosReg 0x5d - -/* --- IO Macros by AMR --- */ - -#define CRINB(reg) (OUTPORT8(0x3d4,reg), INPORT8(0x3d5)) -#define SRINB(reg) (OUTPORT8(0x3c4,reg), INPORT8(0x3c5)) -#define CROUTB(reg,val) (OUTPORT8(0x3d4,reg), OUTPORT8(0x3d5,val)) -#define SROUTB(reg,val) (OUTPORT8(0x3c4,reg), OUTPORT8(0x3c5,val)) - -/* --- */ - diff --git a/vidix/drivers/cyberblade_vid.c b/vidix/drivers/cyberblade_vid.c deleted file mode 100644 index 3000bab87d..0000000000 --- a/vidix/drivers/cyberblade_vid.c +++ /dev/null @@ -1,647 +0,0 @@ -/* - Driver for CyberBlade/i1 - Version 0.1.4 - - Copyright (C) 2002 by Alastair M. Robinson. - Official homepage: http://www.blackfiveservices.co.uk/EPIAVidix.shtml - - Based on Permedia 3 driver by Måns Rullgård - - Thanks to Gilles Frattini for bugfixes - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - - Changes: - 18/01/03 - MMIO is no longer used, sidestepping cache issues on EPIA-800 - TV-Out modes are now better supported - this should be the end - of the magenta stripes :) - Brightness/Contrast controls disabled for the time being - they were - seriously degrading picture quality, especially with TV-Out. - - To Do: - Implement Hue/Saturation controls - Support / Test multiple frames - Test colour-key code more extensively -*/ - -#include -#include -#include -#include -#include -#include - -#include "../vidix.h" -#include "../fourcc.h" -#include "../../libdha/libdha.h" -#include "../../libdha/pci_ids.h" -#include "../../libdha/pci_names.h" -#include "../../config.h" - -#include "cyberblade_regs.h" - -pciinfo_t pci_info; - -char save_colourkey[6]; -char *cyberblade_mem; - -#ifdef DEBUG_LOGFILE -FILE *logfile=0; -#define LOGWRITE(x) {if(logfile) fprintf(logfile,x);} -#else -#define LOGWRITE(x) -#endif - -/* Helper functions for reading registers. */ - -static int CRINW(int reg) -{ - int result; - result=CRINB(reg); - result|=CRINB(reg+1)<<8; - return(result); -} - -static void CROUTW(int reg,int val) -{ - CROUTB(reg,val&255); - CROUTB(reg+1,(val>>8)&255); -} - -static int SRINW(int reg) -{ - int result; - result=SRINB(reg); - result|=SRINB(reg+1)<<8; - return(result); -} - -static void SROUTW(int reg,int val) -{ - SROUTB(reg,val&255); - SROUTB(reg+1,(val>>8)&255); -} - -void DumpRegisters(void) -{ - int reg,val; -#ifdef DEBUG_LOGFILE - if(logfile) - { - LOGWRITE("CRTC Register Dump:\n") - for(reg=0;reg<256;++reg) - { - val=CRINB(reg); - fprintf(logfile,"CR0x%2x: 0x%2x\n",reg,val); - } - LOGWRITE("SR Register Dump:\n") - for(reg=0;reg<256;++reg) - { - val=SRINB(reg); - fprintf(logfile,"SR0x%2x: 0x%2x\n",reg,val); - } - } -#endif -} -/* --- */ - -static vidix_capability_t cyberblade_cap = -{ - "Trident CyberBlade i1 driver", - "Alastair M. Robinson ", - TYPE_OUTPUT, - { 0, 0, 0, 0 }, - 1024, - 1024, - 4, - 4, - -1, - FLAG_UPSCALER|FLAG_DOWNSCALER, - VENDOR_TRIDENT, - -1, - { 0, 0, 0, 0 } -}; - - -unsigned int vixGetVersion(void) -{ - return(VIDIX_VERSION); -} - - -static unsigned short cyberblade_card_ids[] = -{ - DEVICE_TRIDENT_CYBERBLADE_I7, - DEVICE_TRIDENT_CYBERBLADE_I7D, - DEVICE_TRIDENT_CYBERBLADE_I1, - DEVICE_TRIDENT_CYBERBLADE_I12, - DEVICE_TRIDENT_CYBERBLADE_I13, - DEVICE_TRIDENT_CYBERBLADE_XPAI1 -}; - - -static int find_chip(unsigned chip_id) -{ - unsigned i; - for(i = 0;i < sizeof(cyberblade_card_ids)/sizeof(unsigned short);i++) - { - if(chip_id == cyberblade_card_ids[i]) return i; - } - return -1; -} - -int vixProbe(int verbose, int force) -{ - pciinfo_t lst[MAX_PCI_DEVICES]; - unsigned i,num_pci; - int err; - err = pci_scan(lst,&num_pci); - if(err) - { - printf("[cyberblade] Error occurred during pci scan: %s\n",strerror(err)); - return err; - } - else - { - err = ENXIO; - for(i=0; i < num_pci; i++) - { - if(lst[i].vendor == VENDOR_TRIDENT) - { - int idx; - const char *dname; - idx = find_chip(lst[i].device); - if(idx == -1) - continue; - dname = pci_device_name(VENDOR_TRIDENT, lst[i].device); - dname = dname ? dname : "Unknown chip"; - printf("[cyberblade] Found chip: %s\n", dname); - if ((lst[i].command & PCI_COMMAND_IO) == 0) - { - printf("[cyberblade] Device is disabled, ignoring\n"); - continue; - } - cyberblade_cap.device_id = lst[i].device; - err = 0; - memcpy(&pci_info, &lst[i], sizeof(pciinfo_t)); - break; - } - } - } - - if(err && verbose) printf("[cyberblade] Can't find chip\n"); - return err; -} - - -int vixInit(void) -{ - cyberblade_mem = map_phys_mem(pci_info.base0, 0x800000); - enable_app_io(); - save_colourkey[0]=SRINB(0x50); - save_colourkey[1]=SRINB(0x51); - save_colourkey[2]=SRINB(0x52); - save_colourkey[3]=SRINB(0x54); - save_colourkey[4]=SRINB(0x55); - save_colourkey[5]=SRINB(0x56); -#ifdef DEBUG_LOGFILE - logfile=fopen("/tmp/cyberblade_vidix.log","w"); -#endif - return 0; -} - -void vixDestroy(void) -{ - int protect; -#ifdef DEBUG_LOGFILE - if(logfile) - fclose(logfile); -#endif - protect=SRINB(0x11); - SROUTB(0x11, 0x92); - CROUTB(0x8E, 0xc4); /* Disable overlay */ - SROUTB(0x50,save_colourkey[0]); - SROUTB(0x51,save_colourkey[1]); - SROUTB(0x52,save_colourkey[2]); - SROUTB(0x54,save_colourkey[3]); - SROUTB(0x55,save_colourkey[4]); - SROUTB(0x56,save_colourkey[5]); - SROUTB(0x11, protect); - disable_app_io(); - unmap_phys_mem(cyberblade_mem, 0x800000); -} - - -int vixGetCapability(vidix_capability_t *to) -{ - memcpy(to, &cyberblade_cap, sizeof(vidix_capability_t)); - return 0; -} - - -static int is_supported_fourcc(uint32_t fourcc) -{ - switch(fourcc) - { - case IMGFMT_YUY2: - case IMGFMT_YV12: - case IMGFMT_I420: - case IMGFMT_YVU9: - case IMGFMT_BGR16: - return 1; - default: - return 0; - } -} - -int vixQueryFourcc(vidix_fourcc_t *to) -{ - if(is_supported_fourcc(to->fourcc)) - { - to->depth = VID_DEPTH_1BPP | VID_DEPTH_2BPP | - VID_DEPTH_4BPP | VID_DEPTH_8BPP | - VID_DEPTH_12BPP| VID_DEPTH_15BPP| - VID_DEPTH_16BPP| VID_DEPTH_24BPP| - VID_DEPTH_32BPP; - to->flags = VID_CAP_EXPAND | VID_CAP_SHRINK | VID_CAP_COLORKEY; - return 0; - } - else - to->depth = to->flags = 0; - return ENOSYS; -} - - -static int frames[VID_PLAY_MAXFRAMES]; - -static vidix_grkey_t cyberblade_grkey; - -int vixGetGrKeys(vidix_grkey_t *grkey) -{ - memcpy(grkey, &cyberblade_grkey, sizeof(vidix_grkey_t)); - return(0); -} - -int vixSetGrKeys(const vidix_grkey_t *grkey) -{ - int pixfmt=CRINB(0x38); - int protect; - memcpy(&cyberblade_grkey, grkey, sizeof(vidix_grkey_t)); - - protect=SRINB(0x11); - SROUTB(0x11, 0x92); - - if(pixfmt&0x28) /* 32 or 24 bpp */ - { - SROUTB(0x50, cyberblade_grkey.ckey.blue); /* Colour Key */ - SROUTB(0x51, cyberblade_grkey.ckey.green); /* Colour Key */ - SROUTB(0x52, cyberblade_grkey.ckey.red); /* Colour Key */ - SROUTB(0x54, 0xff); /* Colour Key Mask */ - SROUTB(0x55, 0xff); /* Colour Key Mask */ - SROUTB(0x56, 0xff); /* Colour Key Mask */ - } - else - { - int tmp=((cyberblade_grkey.ckey.blue & 0xF8)>>3) - | ((cyberblade_grkey.ckey.green & 0xfc)<<3) - | ((cyberblade_grkey.ckey.red & 0xf8)<<8); - SROUTB(0x50, tmp&0xff); /* Colour Key */ - SROUTB(0x51, (tmp>>8)&0xff); /* Colour Key */ - SROUTB(0x52, 0); /* Colour Key */ - SROUTB(0x54, 0xff); /* Colour Key Mask */ - SROUTB(0x55, 0xff); /* Colour Key Mask */ - SROUTB(0x56, 0x00); /* Colour Key Mask */ - } - SROUTB(0x11,protect); - return(0); -} - - -vidix_video_eq_t equal = -{ - VEQ_CAP_BRIGHTNESS | VEQ_CAP_SATURATION | VEQ_CAP_HUE, - 300, 100, 0, 0, 0, 0, 0, 0 -}; - -int vixPlaybackGetEq( vidix_video_eq_t * eq) -{ - memcpy(eq,&equal,sizeof(vidix_video_eq_t)); - return 0; -} - -int vixPlaybackSetEq( const vidix_video_eq_t * eq) -{ - int br,sat,cr,protect; - if(eq->cap & VEQ_CAP_BRIGHTNESS) equal.brightness = eq->brightness; - if(eq->cap & VEQ_CAP_CONTRAST) equal.contrast = eq->contrast; - if(eq->cap & VEQ_CAP_SATURATION) equal.saturation = eq->saturation; - if(eq->cap & VEQ_CAP_HUE) equal.hue = eq->hue; - if(eq->cap & VEQ_CAP_RGB_INTENSITY) - { - equal.red_intensity = eq->red_intensity; - equal.green_intensity = eq->green_intensity; - equal.blue_intensity = eq->blue_intensity; - } - equal.flags = eq->flags; - - cr = (equal.contrast) * 31 / 2000; cr+=16; - if (cr < 0) cr = 0; if(cr > 7) cr = 7; - cr=cr<<4 | cr; - - br = (equal.brightness+1000) * 63 / 2000; - if (br < 0) br = 0; if(br > 63) br = 63; - if(br>32) br-=32; else br+=32; - - sat = (equal.saturation + 1000) * 16 / 2000; - if (sat < 0) sat = 0; if(sat > 31) sat = 31; - - protect=SRINB(0x11); - SROUTB(0x11, 0x92); - - SROUTB(0xBC,cr); - SROUTW(0xB0,(br<<10)|4); - - SROUTB(0x11, protect); - - return 0; -} - - -static int YOffs,UOffs,VOffs; - -int vixConfigPlayback(vidix_playback_t *info) -{ - int shrink, zoom; - int src_w, drw_w; - int src_h, drw_h; - int hscale,vscale; - long base0; - int y_pitch, uv_pitch; - int protect=0; - int layout=0; - unsigned int i; - - if(!is_supported_fourcc(info->fourcc)) - return -1; - - src_w = info->src.w; - src_h = info->src.h; - - drw_w = info->dest.w; - drw_h = info->dest.h; - - switch(info->fourcc) - { - case IMGFMT_YUY2: - case IMGFMT_BGR16: - y_pitch = (src_w*2 + 15) & ~15; - uv_pitch = 0; - YOffs=VOffs=UOffs=info->offset.y = info->offset.v = info->offset.u = 0; - info->frame_size = y_pitch*src_h; - layout=0x0; /* packed */ - break; - case IMGFMT_YV12: - case IMGFMT_I420: - y_pitch = (src_w+15) & ~15; - uv_pitch = ((src_w/2)+7) & ~7; - YOffs=info->offset.y = 0; - VOffs=info->offset.v = y_pitch*src_h; - UOffs=info->offset.u = info->offset.v+(uv_pitch)*(src_h/2); - info->frame_size = y_pitch*src_h + 2*uv_pitch*(src_h/2); - layout=0x1; /* planar, 4:1:1 */ - break; - case IMGFMT_YVU9: - y_pitch = (src_w+15) & ~15; - uv_pitch = ((src_w/4)+3) & ~3; - YOffs=info->offset.y = 0; - VOffs=info->offset.v = y_pitch*src_h; - UOffs=info->offset.u = info->offset.v+(uv_pitch)*(src_h/4); - info->frame_size = y_pitch*src_h + 2*uv_pitch*(src_h/4); - layout=0x51; /* planar, 16:1:1 */ - break; - } - - /* Assume we have 2 MB to play with */ - info->num_frames = 0x200000 / info->frame_size; - if(info->num_frames > VID_PLAY_MAXFRAMES) - info->num_frames = VID_PLAY_MAXFRAMES; - - /* Start at 6 MB. Let's hope it's not in use. */ - base0 = 0x600000; - info->dga_addr = cyberblade_mem + base0; - - info->dest.pitch.y = 16; - info->dest.pitch.u = 16; - info->dest.pitch.v = 16; - - for(i = 0; i < info->num_frames; i++) - { - info->offsets[i] = info->frame_size * i; - frames[i] = base0+info->offsets[i]; - } - - OUTPORT8(0x3d4,0x39); - OUTPORT8(0x3d5,INPORT(0x3d5)|1); - - SRINB(0x0b); /* Select new mode */ - - /* Unprotect hardware registers... */ - protect=SRINB(0x11); - SROUTB(0x11, 0x92); - - SROUTB(0x57, 0xc0); /* Playback key function */ - SROUTB(0x21, 0x34); /* Signature control */ - SROUTB(0x37, 0x30); /* Video key mode */ - - vixSetGrKeys(&cyberblade_grkey); - - /* compute_scale_factor(&src_w, &drw_w, &shrink, &zoom); */ - { - int HTotal,VTotal,HSync,VSync,Overflow,HDisp,VDisp; - int HWinStart,VWinStart; - int tx1,ty1,tx2,ty2; - - HTotal=CRINB(0x00); - HSync=CRINB(0x04); - VTotal=CRINB(0x06); - VSync=CRINB(0x10); - Overflow=CRINB(0x07); - HTotal <<=3; - HSync <<=3; - VTotal |= (Overflow & 1) <<8; - VTotal |= (Overflow & 0x20) <<4; - VTotal +=4; - VSync |= (Overflow & 4) <<6; - VSync |= (Overflow & 0x80) <<2; - - if(CRINB(0xd1)&0x80) - { - int TVHTotal,TVVTotal,TVHSyncStart,TVVSyncStart,TVOverflow; - LOGWRITE("[cyberblade] Using TV-CRTC\n"); - - HDisp=(1+CRINB(0x01))*8; - VDisp=1+CRINB(0x12); - Overflow=CRINB(0x07); - VDisp |= (Overflow & 2) <<7; - VDisp |= (Overflow & 0x40) << 3; - - TVHTotal=CRINB(0xe0)*8; - TVVTotal=CRINB(0xe6); - TVOverflow=CRINB(0xe7); - if(TVOverflow&0x20) TVVTotal|=512; - if(TVOverflow&0x01) TVVTotal|=256; - TVHTotal+=40; TVVTotal+=2; - - TVHSyncStart=CRINB(0xe4)*8; - TVVSyncStart=CRINB(0xf0); - if(TVOverflow&0x80) TVVSyncStart|=512; - if(TVOverflow&0x04) TVVSyncStart|=256; - - HWinStart=(TVHTotal-HDisp)&15; - HWinStart|=(HTotal-HDisp)&15; - HWinStart+=(TVHTotal-TVHSyncStart)-49; - } - else - { - LOGWRITE("[cyberblade] Using Standard CRTC\n"); - HWinStart=(HTotal-HSync)+15; - } - VWinStart=(VTotal-VSync)-8; - - printf("[cyberblade] HTotal: 0x%x, HSStart: 0x%x\n",HTotal,HSync); - printf(" VTotal: 0x%x, VStart: 0x%x\n",VTotal,VSync); - tx1=HWinStart+info->dest.x; - ty1=VWinStart+info->dest.y; - tx2=tx1+info->dest.w; - ty2=ty1+info->dest.h; - - CROUTW(0x86,tx1); - CROUTW(0x88,ty1); - CROUTW(0x8a,tx2); - CROUTW(0x8c,ty2+3); - } - - if(src_w==drw_w) - hscale=0; - else if(src_w> 2; - CROUTB(0x95, ((lb & 0x100)>>1) | 0x08 ); /* Linebuffer level bit 8 & threshold */ - CROUTB(0x96, (lb & 0xFF)); /* Linebuffer level */ - - CROUTB(0x97, 0x00); /* VDE Flags */ - CROUTB(0xBA, 0x00); /* Chroma key */ - CROUTB(0xBB, 0x00); /* Chroma key */ - CROUTB(0xBC, 0xFF); /* Chroma key */ - CROUTB(0xBD, 0xFF); /* Chroma key */ - CROUTB(0xBE, 0x04); /* Capture control */ - - if(src_w > 384) - layout|=4; /* 2x line buffers */ - SROUTB(0x97, layout); - - CROUTW(0x90,y_pitch); /* Y Bytes per row */ - SROUTW(0x9A,uv_pitch); /* UV Bytes per row */ - - switch(info->fourcc) - { - case IMGFMT_BGR16: - CROUTB(0x8F, 0x24); /* VDE Flags - Edge Recovery & CSC Bypass */ - CROUTB(0xBF, 0x02); /* Video format - RGB16 */ - SROUTB(0xBE, 0x0); /* HSCB disabled */ - break; - default: - CROUTB(0x8F, 0x20); /* VDE Flags - Edge Recovery */ - CROUTB(0xBF, 0x00); /* Video format - YUV */ - SROUTB(0xBE, 0x00); /* HSCB disable - was 0x03*/ - break; - } - - CROUTB(0x92, ((base0+info->offset.y) >> 3) &0xff); /* Lower 8 bits of start address */ - CROUTB(0x93, ((base0+info->offset.y) >> 11) &0xff); /* Mid 8 bits of start address */ - CROUTB(0x94, ((base0+info->offset.y) >> 19) &0xf); /* Upper 4 bits of start address */ - SROUTB(0x80, ((base0+info->offset.v) >> 3) &0xff); /* Lower 8 bits of start address */ - SROUTB(0x81, ((base0+info->offset.v) >> 11) &0xff); /* Mid 8 bits of start address */ - SROUTB(0x82, ((base0+info->offset.v) >> 19) &0xf); /* Upper 4 bits of start address */ - SROUTB(0x83, ((base0+info->offset.u) >> 3) &0xff); /* Lower 8 bits of start address */ - SROUTB(0x84, ((base0+info->offset.u) >> 11) &0xff); /* Mid 8 bits of start address */ - SROUTB(0x85, ((base0+info->offset.u) >> 19) &0xf); /* Upper 4 bits of start address */ - } - - vixPlaybackSetEq(&equal); - - /* Protect hardware registers again */ - SROUTB(0x11, protect); - return 0; -} - - -int vixPlaybackOn(void) -{ - LOGWRITE("Enable overlay\n"); - CROUTB(0x8E, 0xd4); /* VDE Flags*/ - - return 0; -} - - -int vixPlaybackOff(void) -{ - LOGWRITE("Disable overlay\n"); - CROUTB(0x8E, 0xc4); /* VDE Flags*/ - - return 0; -} - - -int vixPlaybackFrameSelect(unsigned int frame) -{ - int protect; - LOGWRITE("Frame select\n"); - protect=SRINB(0x11); - SROUTB(0x11, 0x92); - /* Set overlay address to that of selected frame */ - CROUTB(0x92, ((frames[frame]+YOffs) >> 3) &0xff); /* Lower 8 bits of start address */ - CROUTB(0x93, ((frames[frame]+YOffs) >> 11) &0xff); /* Mid 8 bits of start address */ - CROUTB(0x94, ((frames[frame]+YOffs) >> 19) &0xf); /* Upper 4 bits of start address */ - SROUTB(0x80, ((frames[frame]+VOffs) >> 3) &0xff); /* Lower 8 bits of start address */ - SROUTB(0x81, ((frames[frame]+VOffs) >> 11) &0xff); /* Mid 8 bits of start address */ - SROUTB(0x82, ((frames[frame]+VOffs) >> 19) &0xf); /* Upper 4 bits of start address */ - SROUTB(0x83, ((frames[frame]+UOffs) >> 3) &0xff); /* Lower 8 bits of start address */ - SROUTB(0x84, ((frames[frame]+UOffs) >> 11) &0xff); /* Mid 8 bits of start address */ - SROUTB(0x85, ((frames[frame]+UOffs) >> 19) &0xf); /* Upper 4 bits of start address */ - SROUTB(0x11, protect); - return 0; -} - - diff --git a/vidix/drivers/mach64.h b/vidix/drivers/mach64.h deleted file mode 100644 index 085d401510..0000000000 --- a/vidix/drivers/mach64.h +++ /dev/null @@ -1,2481 +0,0 @@ -/* - * mach64.h - * This software has been released under the terms of the GNU Public - * license. See http://www.gnu.org/copyleft/gpl.html for details. - * - * It's based on radeonfb, X11, GATOS sources -*/ - -#ifndef __MACH64_INCLUDED -#define __MACH64_INCLUDED 1 - -/* Note: this model of accessing to IO space is based on MMIO technology. -This means that this sources don't support ISA and VLB cards */ -#define BlockIOTag(val) (val) -#define IOPortTag(sparce,val) (val) - -/* MDA/[M]CGA/EGA/VGA I/O ports */ -#define GENVS 0x0102u /* Write (and Read on uC only) */ - -#define R_GENLPS 0x03b9u /* Read */ - -#define GENHP 0x03bfu - -#define ATTRX 0x03c0u -#define ATTRD 0x03c1u -#define GENS0 0x03c2u /* Read */ -#define GENMO 0x03c2u /* Write */ -#define GENENB 0x03c3u /* Read */ -#define SEQX 0x03c4u -#define SEQD 0x03c5u -#define VGA_DAC_MASK 0x03c6u -#define VGA_DAC_READ 0x03c7u -#define VGA_DAC_WRITE 0x03c8u -#define VGA_DAC_DATA 0x03c9u -#define R_GENFC 0x03cau /* Read */ -/* ? 0x03cbu */ -#define R_GENMO 0x03ccu /* Read */ -/* ? 0x03cdu */ -#define GRAX 0x03ceu -#define GRAD 0x03cfu - -#define GENB 0x03d9u - -#define GENLPS 0x03dcu /* Write */ -#define KCX 0x03ddu -#define KCD 0x03deu - -#define GENENA 0x46e8u /* Write */ - -/* I/O port base numbers */ -#define MonochromeIOBase 0x03b0u -#define ColourIOBase 0x03d0u - -/* Other MDA/[M]CGA/EGA/VGA I/O ports */ -/* ?(_IOBase) ((_IOBase) + 0x00u) */ /* CRTX synonym */ -/* ?(_IOBase) ((_IOBase) + 0x01u) */ /* CRTD synonym */ -/* ?(_IOBase) ((_IOBase) + 0x02u) */ /* CRTX synonym */ -/* ?(_IOBase) ((_IOBase) + 0x03u) */ /* CRTD synonym */ -#define CRTX(_IOBase) ((_IOBase) + 0x04u) -#define CRTD(_IOBase) ((_IOBase) + 0x05u) -/* ?(_IOBase) ((_IOBase) + 0x06u) */ -/* ?(_IOBase) ((_IOBase) + 0x07u) */ -#define GENMC(_IOBase) ((_IOBase) + 0x08u) -/* ?(_IOBase) ((_IOBase) + 0x09u) */ /* R_GENLPS/GENB */ -#define GENS1(_IOBase) ((_IOBase) + 0x0au) /* Read */ -#define GENFC(_IOBase) ((_IOBase) + 0x0au) /* Write */ -#define GENLPC(_IOBase) ((_IOBase) + 0x0bu) -/* ?(_IOBase) ((_IOBase) + 0x0cu) */ /* /GENLPS */ -/* ?(_IOBase) ((_IOBase) + 0x0du) */ /* /KCX */ -/* ?(_IOBase) ((_IOBase) + 0x0eu) */ /* /KCD */ -/* ?(_IOBase) ((_IOBase) + 0x0fu) */ /* GENHP/ */ - -/* 8514/A VESA approved register definitions */ -#define DISP_STAT 0x02e8u /* Read */ -#define SENSE 0x0001u /* Presumably belong here */ -#define VBLANK 0x0002u -#define HORTOG 0x0004u -#define H_TOTAL 0x02e8u /* Write */ -#define IBM_DAC_MASK 0x02eau -#define IBM_DAC_READ 0x02ebu -#define IBM_DAC_WRITE 0x02ecu -#define IBM_DAC_DATA 0x02edu -#define H_DISP 0x06e8u /* Write */ -#define H_SYNC_STRT 0x0ae8u /* Write */ -#define H_SYNC_WID 0x0ee8u /* Write */ -#define HSYNCPOL_POS 0x0000u -#define HSYNCPOL_NEG 0x0020u -#define H_POLARITY_POS HSYNCPOL_POS /* Sigh */ -#define H_POLARITY_NEG HSYNCPOL_NEG /* Sigh */ -#define V_TOTAL 0x12e8u /* Write */ -#define V_DISP 0x16e8u /* Write */ -#define V_SYNC_STRT 0x1ae8u /* Write */ -#define V_SYNC_WID 0x1ee8u /* Write */ -#define VSYNCPOL_POS 0x0000u -#define VSYNCPOL_NEG 0x0020u -#define V_POLARITY_POS VSYNCPOL_POS /* Sigh */ -#define V_POLARITY_NEG VSYNCPOL_NEG /* Sigh */ -#define DISP_CNTL 0x22e8u /* Write */ -#define ODDBNKENAB 0x0001u -#define MEMCFG_2 0x0000u -#define MEMCFG_4 0x0002u -#define MEMCFG_6 0x0004u -#define MEMCFG_8 0x0006u -#define DBLSCAN 0x0008u -#define INTERLACE 0x0010u -#define DISPEN_NC 0x0000u -#define DISPEN_ENAB 0x0020u -#define DISPEN_DISAB 0x0040u -#define R_H_TOTAL 0x26e8u /* Read */ -/* ? 0x2ae8u */ -/* ? 0x2ee8u */ -/* ? 0x32e8u */ -/* ? 0x36e8u */ -/* ? 0x3ae8u */ -/* ? 0x3ee8u */ -#define SUBSYS_STAT 0x42e8u /* Read */ -#define VBLNKFLG 0x0001u -#define PICKFLAG 0x0002u -#define INVALIDIO 0x0004u -#define GPIDLE 0x0008u -#define MONITORID_MASK 0x0070u -/* MONITORID_? 0x0000u */ -#define MONITORID_8507 0x0010u -#define MONITORID_8514 0x0020u -/* MONITORID_? 0x0030u */ -/* MONITORID_? 0x0040u */ -#define MONITORID_8503 0x0050u -#define MONITORID_8512 0x0060u -#define MONITORID_8513 0x0060u -#define MONITORID_NONE 0x0070u -#define _8PLANE 0x0080u -#define SUBSYS_CNTL 0x42e8u /* Write */ -#define RVBLNKFLG 0x0001u -#define RPICKFLAG 0x0002u -#define RINVALIDIO 0x0004u -#define RGPIDLE 0x0008u -#define IVBLNKFLG 0x0100u -#define IPICKFLAG 0x0200u -#define IINVALIDIO 0x0400u -#define IGPIDLE 0x0800u -#define CHPTEST_NC 0x0000u -#define CHPTEST_NORMAL 0x1000u -#define CHPTEST_ENAB 0x2000u -#define GPCTRL_NC 0x0000u -#define GPCTRL_ENAB 0x4000u -#define GPCTRL_RESET 0x8000u -#define ROM_PAGE_SEL 0x46e8u /* Write */ -#define ADVFUNC_CNTL 0x4ae8u /* Write */ -#define DISABPASSTHRU 0x0001u -#define CLOKSEL 0x0004u -/* ? 0x4ee8u */ -#define EXT_CONFIG_0 0x52e8u /* C & T 82C480 */ -#define EXT_CONFIG_1 0x56e8u /* C & T 82C480 */ -#define EXT_CONFIG_2 0x5ae8u /* C & T 82C480 */ -#define EXT_CONFIG_3 0x5ee8u /* C & T 82C480 */ -/* ? 0x62e8u */ -/* ? 0x66e8u */ -/* ? 0x6ae8u */ -/* ? 0x6ee8u */ -/* ? 0x72e8u */ -/* ? 0x76e8u */ -/* ? 0x7ae8u */ -/* ? 0x7ee8u */ -#define CUR_Y 0x82e8u -#define CUR_X 0x86e8u -#define DESTY_AXSTP 0x8ae8u /* Write */ -#define DESTX_DIASTP 0x8ee8u /* Write */ -#define ERR_TERM 0x92e8u -#define MAJ_AXIS_PCNT 0x96e8u /* Write */ -#define GP_STAT 0x9ae8u /* Read */ -#define GE_STAT 0x9ae8u /* Alias */ -#define DATARDY 0x0100u -#define DATA_READY DATARDY /* Alias */ -#define GPBUSY 0x0200u -#define CMD 0x9ae8u /* Write */ -#define WRTDATA 0x0001u -#define PLANAR 0x0002u -#define LASTPIX 0x0004u -#define LINETYPE 0x0008u -#define DRAW 0x0010u -#define INC_X 0x0020u -#define YMAJAXIS 0x0040u -#define INC_Y 0x0080u -#define PCDATA 0x0100u -#define _16BIT 0x0200u -#define CMD_NOP 0x0000u -#define CMD_OP_MSK 0xf000u -#define BYTSEQ 0x1000u -#define CMD_LINE 0x2000u -#define CMD_RECT 0x4000u -#define CMD_RECTV1 0x6000u -#define CMD_RECTV2 0x8000u -#define CMD_LINEAF 0xa000u -#define CMD_BITBLT 0xc000u -#define SHORT_STROKE 0x9ee8u /* Write */ -#define SSVDRAW 0x0010u -#define VECDIR_000 0x0000u -#define VECDIR_045 0x0020u -#define VECDIR_090 0x0040u -#define VECDIR_135 0x0060u -#define VECDIR_180 0x0080u -#define VECDIR_225 0x00a0u -#define VECDIR_270 0x00c0u -#define VECDIR_315 0x00e0u -#define BKGD_COLOR 0xa2e8u /* Write */ -#define FRGD_COLOR 0xa6e8u /* Write */ -#define WRT_MASK 0xaae8u /* Write */ -#define RD_MASK 0xaee8u /* Write */ -#define COLOR_CMP 0xb2e8u /* Write */ -#define BKGD_MIX 0xb6e8u /* Write */ -/* 0x001fu See MIX_* definitions below */ -#define BSS_BKGDCOL 0x0000u -#define BSS_FRGDCOL 0x0020u -#define BSS_PCDATA 0x0040u -#define BSS_BITBLT 0x0060u -#define FRGD_MIX 0xbae8u /* Write */ -/* 0x001fu See MIX_* definitions below */ -#define FSS_BKGDCOL 0x0000u -#define FSS_FRGDCOL 0x0020u -#define FSS_PCDATA 0x0040u -#define FSS_BITBLT 0x0060u -#define MULTIFUNC_CNTL 0xbee8u /* Write */ -#define MIN_AXIS_PCNT 0x0000u -#define SCISSORS_T 0x1000u -#define SCISSORS_L 0x2000u -#define SCISSORS_B 0x3000u -#define SCISSORS_R 0x4000u -#define M32_MEM_CNTL 0x5000u -#define HORCFG_4 0x0000u -#define HORCFG_5 0x0001u -#define HORCFG_8 0x0002u -#define HORCFG_10 0x0003u -#define VRTCFG_2 0x0000u -#define VRTCFG_4 0x0004u -#define VRTCFG_6 0x0008u -#define VRTCFG_8 0x000cu -#define BUFSWP 0x0010u -#define PATTERN_L 0x8000u -#define PATTERN_H 0x9000u -#define PIX_CNTL 0xa000u -#define PLANEMODE 0x0004u -#define COLCMPOP_F 0x0000u -#define COLCMPOP_T 0x0008u -#define COLCMPOP_GE 0x0010u -#define COLCMPOP_LT 0x0018u -#define COLCMPOP_NE 0x0020u -#define COLCMPOP_EQ 0x0028u -#define COLCMPOP_LE 0x0030u -#define COLCMPOP_GT 0x0038u -#define MIXSEL_FRGDMIX 0x0000u -#define MIXSEL_PATT 0x0040u -#define MIXSEL_EXPPC 0x0080u -#define MIXSEL_EXPBLT 0x00c0u -/* ? 0xc2e8u */ -/* ? 0xc6e8u */ -/* ? 0xcae8u */ -/* ? 0xcee8u */ -/* ? 0xd2e8u */ -/* ? 0xd6e8u */ -/* ? 0xdae8u */ -/* ? 0xdee8u */ -#define PIX_TRANS 0xe2e8u -/* ? 0xe6e8u */ -/* ? 0xeae8u */ -/* ? 0xeee8u */ -/* ? 0xf2e8u */ -/* ? 0xf6e8u */ -/* ? 0xfae8u */ -/* ? 0xfee8u */ - -/* ATI Mach8 & Mach32 register definitions */ -#define OVERSCAN_COLOR_8 0x02eeu /* Write */ /* Mach32 */ -#define OVERSCAN_BLUE_24 0x02efu /* Write */ /* Mach32 */ -#define OVERSCAN_GREEN_24 0x06eeu /* Write */ /* Mach32 */ -#define OVERSCAN_RED_24 0x06efu /* Write */ /* Mach32 */ -#define CURSOR_OFFSET_LO 0x0aeeu /* Write */ /* Mach32 */ -#define CURSOR_OFFSET_HI 0x0eeeu /* Write */ /* Mach32 */ -#define CONFIG_STATUS_1 0x12eeu /* Read */ -#define CLK_MODE 0x0001u /* Mach8 */ -#define BUS_16 0x0002u /* Mach8 */ -#define MC_BUS 0x0004u /* Mach8 */ -#define EEPROM_ENA 0x0008u /* Mach8 */ -#define DRAM_ENA 0x0010u /* Mach8 */ -#define MEM_INSTALLED 0x0060u /* Mach8 */ -#define ROM_ENA 0x0080u /* Mach8 */ -#define ROM_PAGE_ENA 0x0100u /* Mach8 */ -#define ROM_LOCATION 0xfe00u /* Mach8 */ -#define _8514_ONLY 0x0001u /* Mach32 */ -#define BUS_TYPE 0x000eu /* Mach32 */ -#define ISA_16_BIT 0x0000u /* Mach32 */ -#define EISA 0x0002u /* Mach32 */ -#define MICRO_C_16_BIT 0x0004u /* Mach32 */ -#define MICRO_C_8_BIT 0x0006u /* Mach32 */ -#define LOCAL_386SX 0x0008u /* Mach32 */ -#define LOCAL_386DX 0x000au /* Mach32 */ -#define LOCAL_486 0x000cu /* Mach32 */ -#define PCI 0x000eu /* Mach32 */ -#define MEM_TYPE 0x0070u /* Mach32 */ -#define CHIP_DIS 0x0080u /* Mach32 */ -#define TST_VCTR_ENA 0x0100u /* Mach32 */ -#define DACTYPE 0x0e00u /* Mach32 */ -#define MC_ADR_DECODE 0x1000u /* Mach32 */ -#define CARD_ID 0xe000u /* Mach32 */ -#define HORZ_CURSOR_POSN 0x12eeu /* Write */ /* Mach32 */ -#define CONFIG_STATUS_2 0x16eeu /* Read */ -#define SHARE_CLOCK 0x0001u /* Mach8 */ -#define HIRES_BOOT 0x0002u /* Mach8 */ -#define EPROM_16_ENA 0x0004u /* Mach8 */ -#define WRITE_PER_BIT 0x0008u /* Mach8 */ -#define FLASH_ENA 0x0010u /* Mach8 */ -#define SLOW_SEQ_EN 0x0001u /* Mach32 */ -#define MEM_ADDR_DIS 0x0002u /* Mach32 */ -#define ISA_16_ENA 0x0004u /* Mach32 */ -#define KOR_TXT_MODE_ENA 0x0008u /* Mach32 */ -#define LOCAL_BUS_SUPPORT 0x0030u /* Mach32 */ -#define LOCAL_BUS_CONFIG_2 0x0040u /* Mach32 */ -#define LOCAL_BUS_RD_DLY_ENA 0x0080u /* Mach32 */ -#define LOCAL_DAC_EN 0x0100u /* Mach32 */ -#define LOCAL_RDY_EN 0x0200u /* Mach32 */ -#define EEPROM_ADR_SEL 0x0400u /* Mach32 */ -#define GE_STRAP_SEL 0x0800u /* Mach32 */ -#define VESA_RDY 0x1000u /* Mach32 */ -#define Z4GB 0x2000u /* Mach32 */ -#define LOC2_MDRAM 0x4000u /* Mach32 */ -#define VERT_CURSOR_POSN 0x16eeu /* Write */ /* Mach32 */ -#define FIFO_TEST_DATA 0x1aeeu /* Read */ /* Mach32 */ -#define CURSOR_COLOR_0 0x1aeeu /* Write */ /* Mach32 */ -#define CURSOR_COLOR_1 0x1aefu /* Write */ /* Mach32 */ -#define HORZ_CURSOR_OFFSET 0x1eeeu /* Write */ /* Mach32 */ -#define VERT_CURSOR_OFFSET 0x1eefu /* Write */ /* Mach32 */ -#define PCI_CNTL 0x22eeu /* Mach32-PCI */ -#define CRT_PITCH 0x26eeu /* Write */ -#define CRT_OFFSET_LO 0x2aeeu /* Write */ -#define CRT_OFFSET_HI 0x2eeeu /* Write */ -#define LOCAL_CNTL 0x32eeu /* Mach32 */ -#define FIFO_OPT 0x36eeu /* Write */ /* Mach8 */ -#define MISC_OPTIONS 0x36eeu /* Mach32 */ -#define W_STATE_ENA 0x0000u /* Mach32 */ -#define HOST_8_ENA 0x0001u /* Mach32 */ -#define MEM_SIZE_ALIAS 0x000cu /* Mach32 */ -#define MEM_SIZE_512K 0x0000u /* Mach32 */ -#define MEM_SIZE_1M 0x0004u /* Mach32 */ -#define MEM_SIZE_2M 0x0008u /* Mach32 */ -#define MEM_SIZE_4M 0x000cu /* Mach32 */ -#define DISABLE_VGA 0x0010u /* Mach32 */ -#define _16_BIT_IO 0x0020u /* Mach32 */ -#define DISABLE_DAC 0x0040u /* Mach32 */ -#define DLY_LATCH_ENA 0x0080u /* Mach32 */ -#define TEST_MODE 0x0100u /* Mach32 */ -#define BLK_WR_ENA 0x0400u /* Mach32 */ -#define _64_DRAW_ENA 0x0800u /* Mach32 */ -#define FIFO_TEST_TAG 0x3aeeu /* Read */ /* Mach32 */ -#define EXT_CURSOR_COLOR_0 0x3aeeu /* Write */ /* Mach32 */ -#define EXT_CURSOR_COLOR_1 0x3eeeu /* Write */ /* Mach32 */ -#define MEM_BNDRY 0x42eeu /* Mach32 */ -#define MEM_PAGE_BNDRY 0x000fu /* Mach32 */ -#define MEM_BNDRY_ENA 0x0010u /* Mach32 */ -#define SHADOW_CTL 0x46eeu /* Write */ -#define CLOCK_SEL 0x4aeeu -/* DISABPASSTHRU 0x0001u See ADVFUNC_CNTL */ -#define VFIFO_DEPTH_1 0x0100u /* Mach32 */ -#define VFIFO_DEPTH_2 0x0200u /* Mach32 */ -#define VFIFO_DEPTH_3 0x0300u /* Mach32 */ -#define VFIFO_DEPTH_4 0x0400u /* Mach32 */ -#define VFIFO_DEPTH_5 0x0500u /* Mach32 */ -#define VFIFO_DEPTH_6 0x0600u /* Mach32 */ -#define VFIFO_DEPTH_7 0x0700u /* Mach32 */ -#define VFIFO_DEPTH_8 0x0800u /* Mach32 */ -#define VFIFO_DEPTH_9 0x0900u /* Mach32 */ -#define VFIFO_DEPTH_A 0x0a00u /* Mach32 */ -#define VFIFO_DEPTH_B 0x0b00u /* Mach32 */ -#define VFIFO_DEPTH_C 0x0c00u /* Mach32 */ -#define VFIFO_DEPTH_D 0x0d00u /* Mach32 */ -#define VFIFO_DEPTH_E 0x0e00u /* Mach32 */ -#define VFIFO_DEPTH_F 0x0f00u /* Mach32 */ -#define COMPOSITE_SYNC 0x1000u -/* ? 0x4eeeu */ -#define ROM_ADDR_1 0x52eeu -#define BIOS_BASE_SEGMENT 0x007fu /* Mach32 */ -/* ? 0xff80u */ /* Mach32 */ -#define ROM_ADDR_2 0x56eeu /* Sick ... */ -#define SHADOW_SET 0x5aeeu /* Write */ -#define MEM_CFG 0x5eeeu /* Mach32 */ -#define MEM_APERT_SEL 0x0003u /* Mach32 */ -#define MEM_APERT_PAGE 0x000cu /* Mach32 */ -#define MEM_APERT_LOC 0xfff0u /* Mach32 */ -#define EXT_GE_STATUS 0x62eeu /* Read */ /* Mach32 */ -#define HORZ_OVERSCAN 0x62eeu /* Write */ /* Mach32 */ -#define VERT_OVERSCAN 0x66eeu /* Write */ /* Mach32 */ -#define MAX_WAITSTATES 0x6aeeu -#define GE_OFFSET_LO 0x6eeeu /* Write */ -#define BOUNDS_LEFT 0x72eeu /* Read */ -#define GE_OFFSET_HI 0x72eeu /* Write */ -#define BOUNDS_TOP 0x76eeu /* Read */ -#define GE_PITCH 0x76eeu /* Write */ -#define BOUNDS_RIGHT 0x7aeeu /* Read */ -#define EXT_GE_CONFIG 0x7aeeu /* Write */ /* Mach32 */ -#define MONITOR_ALIAS 0x0007u /* Mach32 */ -/* MONITOR_? 0x0000u */ /* Mach32 */ -#define MONITOR_8507 0x0001u /* Mach32 */ -#define MONITOR_8514 0x0002u /* Mach32 */ -/* MONITOR_? 0x0003u */ /* Mach32 */ -/* MONITOR_? 0x0004u */ /* Mach32 */ -#define MONITOR_8503 0x0005u /* Mach32 */ -#define MONITOR_8512 0x0006u /* Mach32 */ -#define MONITOR_8513 0x0006u /* Mach32 */ -#define MONITOR_NONE 0x0007u /* Mach32 */ -#define ALIAS_ENA 0x0008u /* Mach32 */ -#define PIXEL_WIDTH_4 0x0000u /* Mach32 */ -#define PIXEL_WIDTH_8 0x0010u /* Mach32 */ -#define PIXEL_WIDTH_16 0x0020u /* Mach32 */ -#define PIXEL_WIDTH_24 0x0030u /* Mach32 */ -#define RGB16_555 0x0000u /* Mach32 */ -#define RGB16_565 0x0040u /* Mach32 */ -#define RGB16_655 0x0080u /* Mach32 */ -#define RGB16_664 0x00c0u /* Mach32 */ -#define MULTIPLEX_PIXELS 0x0100u /* Mach32 */ -#define RGB24 0x0000u /* Mach32 */ -#define RGBx24 0x0200u /* Mach32 */ -#define BGR24 0x0400u /* Mach32 */ -#define xBGR24 0x0600u /* Mach32 */ -#define DAC_8_BIT_EN 0x4000u /* Mach32 */ -#define ORDER_16BPP_565 RGB16_565 /* Mach32 */ -#define BOUNDS_BOTTOM 0x7eeeu /* Read */ -#define MISC_CNTL 0x7eeeu /* Write */ /* Mach32 */ -#define PATT_DATA_INDEX 0x82eeu -/* ? 0x86eeu */ -/* ? 0x8aeeu */ -#define R_EXT_GE_CONFIG 0x8eeeu /* Read */ /* Mach32 */ -#define PATT_DATA 0x8eeeu /* Write */ -#define R_MISC_CNTL 0x92eeu /* Read */ /* Mach32 */ -#define BRES_COUNT 0x96eeu -#define EXT_FIFO_STATUS 0x9aeeu /* Read */ -#define LINEDRAW_INDEX 0x9aeeu /* Write */ -/* ? 0x9eeeu */ -#define LINEDRAW_OPT 0xa2eeu -#define BOUNDS_RESET 0x0100u -#define CLIP_MODE_0 0x0000u /* Clip exception disabled */ -#define CLIP_MODE_1 0x0200u /* Line segments */ -#define CLIP_MODE_2 0x0400u /* Polygon boundary lines */ -#define CLIP_MODE_3 0x0600u /* Patterned lines */ -#define DEST_X_START 0xa6eeu /* Write */ -#define DEST_X_END 0xaaeeu /* Write */ -#define DEST_Y_END 0xaeeeu /* Write */ -#define R_H_TOTAL_DISP 0xb2eeu /* Read */ /* Mach32 */ -#define SRC_X_STRT 0xb2eeu /* Write */ -#define R_H_SYNC_STRT 0xb6eeu /* Read */ /* Mach32 */ -#define ALU_BG_FN 0xb6eeu /* Write */ -#define R_H_SYNC_WID 0xbaeeu /* Read */ /* Mach32 */ -#define ALU_FG_FN 0xbaeeu /* Write */ -#define SRC_X_END 0xbeeeu /* Write */ -#define R_V_TOTAL 0xc2eeu /* Read */ -#define SRC_Y_DIR 0xc2eeu /* Write */ -#define R_V_DISP 0xc6eeu /* Read */ /* Mach32 */ -#define EXT_SHORT_STROKE 0xc6eeu /* Write */ -#define R_V_SYNC_STRT 0xcaeeu /* Read */ /* Mach32 */ -#define SCAN_X 0xcaeeu /* Write */ -#define VERT_LINE_CNTR 0xceeeu /* Read */ /* Mach32 */ -#define DP_CONFIG 0xceeeu /* Write */ -#define READ_WRITE 0x0001u -#define DATA_WIDTH 0x0200u -#define DATA_ORDER 0x1000u -#define FG_COLOR_SRC_FG 0x2000u -#define FG_COLOR_SRC_BLIT 0x6000u -#define R_V_SYNC_WID 0xd2eeu /* Read */ -#define PATT_LENGTH 0xd2eeu /* W