From cf9587fc048be4e7d8dabb6644eac24e2d736ea3 Mon Sep 17 00:00:00 2001 From: wm4 Date: Sat, 28 Jul 2012 17:37:45 +0200 Subject: Remove ancient kernel device drivers These were device driver kernel modules for certain prehistoric graphic cards. The source code indicates these are written against early 2.4 kernels. --- drivers/3dfx.h | 374 --------- drivers/README.Ati | 121 --- drivers/README.Matrox | 46 -- drivers/generic_math.h | 272 ------- drivers/hacking.ati | 313 ------- drivers/mga_vid.c | 1778 ---------------------------------------- drivers/mga_vid.h | 74 -- drivers/mga_vid_test.c | 235 ------ drivers/radeon.h | 2058 ----------------------------------------------- drivers/radeon_vid.c | 1549 ----------------------------------- drivers/radeon_vid.h | 126 --- drivers/tdfx_vid.c | 1049 ------------------------ drivers/tdfx_vid.h | 128 --- drivers/tdfx_vid_test.c | 120 --- 14 files changed, 8243 deletions(-) delete mode 100644 drivers/3dfx.h delete mode 100644 drivers/README.Ati delete mode 100644 drivers/README.Matrox delete mode 100644 drivers/generic_math.h delete mode 100644 drivers/hacking.ati delete mode 100644 drivers/mga_vid.c delete mode 100644 drivers/mga_vid.h delete mode 100644 drivers/mga_vid_test.c delete mode 100644 drivers/radeon.h delete mode 100644 drivers/radeon_vid.c delete mode 100644 drivers/radeon_vid.h delete mode 100644 drivers/tdfx_vid.c delete mode 100644 drivers/tdfx_vid.h delete mode 100644 drivers/tdfx_vid_test.c (limited to 'drivers') diff --git a/drivers/3dfx.h b/drivers/3dfx.h deleted file mode 100644 index 159327d482..0000000000 --- a/drivers/3dfx.h +++ /dev/null @@ -1,374 +0,0 @@ -/* - * Copyright (C) Colin Cross Apr 2000 - * changed by zsteva Aug/Sep 2001, see vo_3dfx.c - * - * This file is part of MPlayer. - * - * MPlayer is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * MPlayer is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with MPlayer; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. - */ - -#ifndef MPLAYER_3DFX_H -#define MPLAYER_3DFX_H - -#define VOODOO_IO_REG_OFFSET ((unsigned long int)0x0000000) -#define VOODOO_YUV_REG_OFFSET ((unsigned long int)0x0080100) -#define VOODOO_AGP_REG_OFFSET ((unsigned long int)0x0080000) -#define VOODOO_2D_REG_OFFSET ((unsigned long int)0x0100000) -#define VOODOO_YUV_PLANE_OFFSET ((unsigned long int)0x0C00000) - -#define VOODOO_BLT_FORMAT_YUYV (8<<16) -#define VOODOO_BLT_FORMAT_UYVY (9<<16) -#define VOODOO_BLT_FORMAT_16 (3<<16) -#define VOODOO_BLT_FORMAT_24 (4<<16) -#define VOODOO_BLT_FORMAT_32 (5<<16) - -#define VOODOO_YUV_STRIDE (1024>>2) - -struct voodoo_yuv_fb_t { - uint32_t Y[0x0040000]; - uint32_t U[0x0040000]; - uint32_t V[0x0040000]; -}; - -struct voodoo_yuv_reg_t { - uint32_t yuvBaseAddr; - uint32_t yuvStride; -}; - -struct voodoo_2d_reg_t { - uint32_t status; - uint32_t intCtrl; - uint32_t clip0Min; - uint32_t clip0Max; - uint32_t dstBaseAddr; - uint32_t dstFormat; - uint32_t srcColorkeyMin; - uint32_t srcColorkeyMax; - uint32_t dstColorkeyMin; - uint32_t dstColorkeyMax; - signed long bresError0; - signed long bresError1; - uint32_t rop; - uint32_t srcBaseAddr; - uint32_t commandExtra; - uint32_t lineStipple; - uint32_t lineStyle; - uint32_t pattern0Alias; - uint32_t pattern1Alias; - uint32_t clip1Min; - uint32_t clip1Max; - uint32_t srcFormat; - uint32_t srcSize; - uint32_t srcXY; - uint32_t colorBack; - uint32_t colorFore; - uint32_t dstSize; - uint32_t dstXY; - uint32_t command; - uint32_t RESERVED1; - uint32_t RESERVED2; - uint32_t RESERVED3; - uint8_t launchArea[128]; -}; - - -struct voodoo_io_reg_t { - uint32_t status; - uint32_t pciInit0; - uint32_t sipMonitor; - uint32_t lfbMemoryConfig; - uint32_t miscInit0; - uint32_t miscInit1; - uint32_t dramInit0; - uint32_t dramInit1; - uint32_t agpInit; - uint32_t tmuGbeInit; - uint32_t vgaInit0; - uint32_t vgaInit1; - uint32_t dramCommand; - uint32_t dramData; - uint32_t RESERVED1; - uint32_t RESERVED2; - - uint32_t pllCtrl0; - uint32_t pllCtrl1; - uint32_t pllCtrl2; - uint32_t dacMode; - uint32_t dacAddr; - uint32_t dacData; - - uint32_t rgbMaxDelta; - uint32_t vidProcCfg; - uint32_t hwCurPatAddr; - uint32_t hwCurLoc; - uint32_t hwCurC0; - uint32_t hwCurC1; - uint32_t vidInFormat; - uint32_t vidInStatus; - uint32_t vidSerialParallelPort; - uint32_t vidInXDecimDeltas; - uint32_t vidInDecimInitErrs; - uint32_t vidInYDecimDeltas; - uint32_t vidPixelBufThold; - uint32_t vidChromaMin; - uint32_t vidChromaMax; - uint32_t vidCurrentLine; - uint32_t vidScreenSize; - uint32_t vidOverlayStartCoords; - uint32_t vidOverlayEndScreenCoord; - uint32_t vidOverlayDudx; - uint32_t vidOverlayDudxOffsetSrcWidth; - uint32_t vidOverlayDvdy; - - uint32_t vga_registers_not_mem_mapped[12]; - uint32_t vidOverlayDvdyOffset; - uint32_t vidDesktopStartAddr; - uint32_t vidDesktopOverlayStride; - uint32_t vidInAddr0; - uint32_t vidInAddr1; - uint32_t vidInAddr2; - uint32_t vidInStride; - uint32_t vidCurrOverlayStartAddr; -}; - - -struct pioData_t { - short port; - short size; - int device; - void *value; -}; - -typedef struct pioData_t pioData; -typedef struct voodoo_2d_reg_t voodoo_2d_reg; -typedef struct voodoo_io_reg_t voodoo_io_reg; -typedef struct voodoo_yuv_reg_t voodoo_yuv_reg; -typedef struct voodoo_yuv_fb_t voodoo_yuv_fb; - - -/* from linux/driver/video/tdfxfb.c, definition for 3dfx registers. - * - * author: Hannu Mallat - */ - -#ifndef PCI_DEVICE_ID_3DFX_VOODOO5 -#define PCI_DEVICE_ID_3DFX_VOODOO5 0x0009 -#endif - -/* membase0 register offsets */ -#define STATUS 0x00 -#define PCIINIT0 0x04 -#define SIPMONITOR 0x08 -#define LFBMEMORYCONFIG 0x0c -#define MISCINIT0 0x10 -#define MISCINIT1 0x14 -#define DRAMINIT0 0x18 -#define DRAMINIT1 0x1c -#define AGPINIT 0x20 -#define TMUGBEINIT 0x24 -#define VGAINIT0 0x28 -#define VGAINIT1 0x2c -#define DRAMCOMMAND 0x30 -#define DRAMDATA 0x34 -/* reserved 0x38 */ -/* reserved 0x3c */ -#define PLLCTRL0 0x40 -#define PLLCTRL1 0x44 -#define PLLCTRL2 0x48 -#define DACMODE 0x4c -#define DACADDR 0x50 -#define DACDATA 0x54 -#define RGBMAXDELTA 0x58 -#define VIDPROCCFG 0x5c -#define HWCURPATADDR 0x60 -#define HWCURLOC 0x64 -#define HWCURC0 0x68 -#define HWCURC1 0x6c -#define VIDINFORMAT 0x70 -#define VIDINSTATUS 0x74 -#define VIDSERPARPORT 0x78 -#define VIDINXDELTA 0x7c -#define VIDININITERR 0x80 -#define VIDINYDELTA 0x84 -#define VIDPIXBUFTHOLD 0x88 -#define VIDCHRMIN 0x8c -#define VIDCHRMAX 0x90 -#define VIDCURLIN 0x94 -#define VIDSCREENSIZE 0x98 -#define VIDOVRSTARTCRD 0x9c -#define VIDOVRENDCRD 0xa0 -#define VIDOVRDUDX 0xa4 -#define VIDOVRDUDXOFF 0xa8 -#define VIDOVRDVDY 0xac -/* ... */ -#define VIDOVRDVDYOFF 0xe0 -#define VIDDESKSTART 0xe4 -#define VIDDESKSTRIDE 0xe8 -#define VIDINADDR0 0xec -#define VIDINADDR1 0xf0 -#define VIDINADDR2 0xf4 -#define VIDINSTRIDE 0xf8 -#define VIDCUROVRSTART 0xfc - -#define INTCTRL (0x00100000 + 0x04) -#define CLIP0MIN (0x00100000 + 0x08) -#define CLIP0MAX (0x00100000 + 0x0c) -#define DSTBASE (0x00100000 + 0x10) -#define DSTFORMAT (0x00100000 + 0x14) -#define SRCCOLORKEYMIN (0x00100000 + 0x18) -#define SRCCOLORKEYMAX (0x00100000 + 0x1c) -#define DSTCOLORKEYMIN (0x00100000 + 0x20) -#define DSTCOLORKEYMAX (0x00100000 + 0x24) -#define ROP123 (0x00100000 + 0x30) -#define SRCBASE (0x00100000 + 0x34) -#define COMMANDEXTRA_2D (0x00100000 + 0x38) -#define CLIP1MIN (0x00100000 + 0x4c) -#define CLIP1MAX (0x00100000 + 0x50) -#define SRCFORMAT (0x00100000 + 0x54) -#define SRCSIZE (0x00100000 + 0x58) -#define SRCXY (0x00100000 + 0x5c) -#define COLORBACK (0x00100000 + 0x60) -#define COLORFORE (0x00100000 + 0x64) -#define DSTSIZE (0x00100000 + 0x68) -#define DSTXY (0x00100000 + 0x6c) -#define COMMAND_2D (0x00100000 + 0x70) -#define LAUNCH_2D (0x00100000 + 0x80) - -#define COMMAND_3D (0x00200000 + 0x120) - -#define SWAPBUFCMD (0x00200000 + 0x128) -#define SWAPPENDING (0x00200000 + 0x24C) -#define LEFTOVBUF (0x00200000 + 0x250) -#define RIGHTOVBUF (0x00200000 + 0x254) -#define FBISWAPBUFHIST (0x00200000 + 0x258) - -/* register bitfields (not all, only as needed) */ - -#define BIT(x) (1UL << (x)) - -/* COMMAND_2D reg. values */ -#define TDFXFB_ROP_COPY 0xcc // src -#define TDFXFB_ROP_INVERT 0x55 // NOT dst -#define TDFXFB_ROP_XOR 0x66 // src XOR dst -#define TDFXFB_ROP_OR 0xee // src | dst - -#define AUTOINC_DSTX BIT(10) -#define AUTOINC_DSTY BIT(11) - - -#define COMMAND_2D_S2S_BITBLT 0x01 // screen to screen -#define COMMAND_2D_S2S_STRECH_BLT 0x02 // BLT + Strech -#define COMMAND_2D_H2S_BITBLT 0x03 // host to screen -#define COMMAND_2D_FILLRECT 0x05 - -#define COMMAND_2D_DO_IMMED BIT(8) // Do it immediatly - - - -#define COMMAND_3D_NOP 0x00 -#define STATUS_RETRACE BIT(6) -#define STATUS_BUSY BIT(9) -#define MISCINIT1_CLUT_INV BIT(0) -#define MISCINIT1_2DBLOCK_DIS BIT(15) -#define DRAMINIT0_SGRAM_NUM BIT(26) -#define DRAMINIT0_SGRAM_TYPE BIT(27) -#define DRAMINIT1_MEM_SDRAM BIT(30) -#define VGAINIT0_VGA_DISABLE BIT(0) -#define VGAINIT0_EXT_TIMING BIT(1) -#define VGAINIT0_8BIT_DAC BIT(2) -#define VGAINIT0_EXT_ENABLE BIT(6) -#define VGAINIT0_WAKEUP_3C3 BIT(8) -#define VGAINIT0_LEGACY_DISABLE BIT(9) -#define VGAINIT0_ALT_READBACK BIT(10) -#define VGAINIT0_FAST_BLINK BIT(11) -#define VGAINIT0_EXTSHIFTOUT BIT(12) -#define VGAINIT0_DECODE_3C6 BIT(13) -#define VGAINIT0_SGRAM_HBLANK_DISABLE BIT(22) -#define VGAINIT1_MASK 0x1fffff -#define VIDCFG_VIDPROC_ENABLE BIT(0) -#define VIDCFG_CURS_X11 BIT(1) -#define VIDCFG_HALF_MODE BIT(4) -#define VIDCFG_DESK_ENABLE BIT(7) -#define VIDCFG_CLUT_BYPASS BIT(10) -#define VIDCFG_2X BIT(26) -#define VIDCFG_HWCURSOR_ENABLE BIT(27) -#define VIDCFG_PIXFMT_SHIFT 18 -#define DACMODE_2X BIT(0) - -/* AGP registers */ -#define AGPREQSIZE (0x0080000 + 0x00) -#define AGPHOSTADDRESSLOW (0x0080000 + 0x04) -#define AGPHOSTADDRESSHIGH (0x0080000 + 0x08) -#define AGPGRAPHICSADDRESS (0x0080000 + 0x0C) -#define AGPGRAPHICSSTRIDE (0x0080000 + 0x10) -#define AGPMOVECMD (0x0080000 + 0x14) - -/* FIFO registers */ -#define CMDBASEADDR0 (0x0080000 + 0x20) -#define CMDBASESIZE0 (0x0080000 + 0x24) -#define CMDBUMP0 (0x0080000 + 0x28) -#define CMDRDPTRL0 (0x0080000 + 0x2C) -#define CMDRDPTRH0 (0x0080000 + 0x30) -#define CMDAMIN0 (0x0080000 + 0x34) -#define CMDAMAX0 (0x0080000 + 0x38) -#define CMDFIFODEPTH0 (0x0080000 + 0x44) -#define CMDHOLECNT0 (0x0080000 + 0x48) - - -/* YUV reisters */ -#define YUVBASEADDRESS (0x0080000 + 0x100) -#define YUVSTRIDE (0x0080000 + 0x104) - -/* VGA rubbish, need to change this for multihead support */ -#define MISC_W 0x3c2 -#define MISC_R 0x3cc -#define SEQ_I 0x3c4 -#define SEQ_D 0x3c5 -#define CRT_I 0x3d4 -#define CRT_D 0x3d5 -#define ATT_IW 0x3c0 -#define RAMDAC_R 0x3c7 -#define RAMDAC_W 0x3c8 -#define RAMDAC_D 0x3c9 -#define IS1_R 0x3da -#define GRA_I 0x3ce -#define GRA_D 0x3cf - -#ifndef FB_ACCEL_3DFX_BANSHEE -#define FB_ACCEL_3DFX_BANSHEE 31 -#endif - -#define TDFXF_HSYNC_ACT_HIGH 0x01 -#define TDFXF_HSYNC_ACT_LOW 0x02 -#define TDFXF_VSYNC_ACT_HIGH 0x04 -#define TDFXF_VSYNC_ACT_LOW 0x08 -#define TDFXF_LINE_DOUBLE 0x10 -#define TDFXF_VIDEO_ENABLE 0x20 - -#define TDFXF_HSYNC_MASK 0x03 -#define TDFXF_VSYNC_MASK 0x0c - -#define XYREG(x,y) (((((unsigned long)y) & 0x1FFF) << 16) | (((unsigned long)x) & 0x1FFF)) - -//#define TDFXFB_DEBUG -#ifdef TDFXFB_DEBUG -#define DPRINTK(a,b...) printk(KERN_DEBUG "fb: %s: " a, __FUNCTION__ , ## b) -#else -#define DPRINTK(a,b...) -#endif - -/* ------------------------------------------------------------------------- */ - -#endif /* MPLAYER_3DFX_H */ diff --git a/drivers/README.Ati b/drivers/README.Ati deleted file mode 100644 index 077b6ffff2..0000000000 --- a/drivers/README.Ati +++ /dev/null @@ -1,121 +0,0 @@ - framebuffer driver for ATI Radeon chipset video boards - ====================================================== - -These files are replacement for linux-2.4.x-ac.y drivers. -To use this driver you should have at least linux-2.4.5-ac.1 -then simply replace linux/drivers/video/radeon* with files -from this directory. -Note: since linux-2.4.10 this driver was moved from -ac to -Linus distribution. - -Alternative way: -~~~~~~~~~~~~~~~~ -Simply type two commands in this directory: -make -make install - -Anyway you should have 'framebuffer support' compiled into linux-kernel -and at least '8bpp packed pixel support' compiled and installed as module. -(But if you plan to use this module with MPlayer you also should have -16bpp, 24bpp and 32bpp pixel support compiled as modules). - - - Radeon video overlay - ==================== - -It was designed for MPlayer and currently can be used only by MPlayer. -It's RGB-YUV BES for Radeon cards (althrough there is experimental -support for Rage128 / Rage128pro chips). - -rage128_vid is contained within radeon_vid.c. As for a Rage128 framebuffer - -use the one from your Linux distribution. - -Installation: -~~~~~~~~~~~~~ - -Simply type two commands in this directory: -make -make install - -Using with MPlayer: -~~~~~~~~~~~~~~~~~~~ - -Currently there is only one way to use ATI's drivers: -mplayer -vo vesa:lvo:/dev/radeon_vid - filename -or -mplayer -vo vesa:lvo:/dev/rage128_vid - filename - -For YV12 formats you can use also: -mplayer -vo mga:/dev/radeon_vid - filename - -but in this case you should load at least radeonfb driver from -this package. - -Configuring: -~~~~~~~~~~~~ - -You can tune some parameters with the following trick: -echo "parameter=value" > /dev/radeon_vid -Example (disables adaptive deinterlacing): -echo "deinterlace=off" > /dev/radeon_vid - -To know more about these parameters - try reading the /dev/radeon_vid file ;) -For example: -cat /dev/radeon_vid - -List of parameters: -~~~~~~~~~~~~~~~~~~~ -If you have Rage128 chip: -brightness=decval (-64:+63) changes brightness -saturation=decval (0:+31) changes saturation 0 == grayscale mode -else - if you have Radeon: -brightness=decval (-1000:+1000) -1000 == black screen -saturation=decval (-1000:+1000) -1000 == grayscaled mode -contrast=decval (-1000:+1000) -1000 == black screen -hue=decval (-1000:+1000) -1000 == +1000 (full circle) - all other values are within this range -Note: 0 is the default value for every parameter on Radeons. -WARNING: This driver violates the rule: "no float in the kernel". -So if you have problems then don't use color correction. - -double_buff=on/off enables/disables double buffering -deinterlace=on/off enables/disables adaptive deinterlacing -deinterlace_pattern=hexval defines deinterlacing pattern - -Driver parameters: -~~~~~~~~~~~~~~~~~~ - -You can use some additional parameters during module loading: -Example: -modprobe radeon_vid swap_fourcc=1 - -List of driver parameters: -~~~~~~~~~~~~~~~~~~~~~~~~~~ -mtrr=1/0 Configures MTRR (if available), default = 1. -swap_fourcc=1/0 Performs byte swapping of passed fourcc. - (It's required for compatibility with -vo mga.) - -To know more about driver parameters execute: -modinfo radeon_vid -or -modinfo rage128_vid - -Note: -~~~~~ -For command line of MPlayer: -You can pass only options with can be recognized by vo_vesa driver. -(Indeed radeon_vid and rage128_vid are stupid things and can only create -video overlay. Mode switching and other adjustments are performed by the -vo_vesa driver. This mean that they use the VESA BIOS as graphics server.) - -Conclusion: -~~~~~~~~~~~ -This stuff (radeon(rage128)_vid) currently doesn't support any standards. - -Full example: -~~~~~~~~~~~~~ -modprobe radeon_vid mtrr=1 -echo "deinterlace_pattern=F0055555" > /dev/radeon_vid -mplayer -vo vesa:lvo:/dev/radeon_vid -fs -zoom -bpp 32 filename - -Enjoy! diff --git a/drivers/README.Matrox b/drivers/README.Matrox deleted file mode 100644 index 48a37ed057..0000000000 --- a/drivers/README.Matrox +++ /dev/null @@ -1,46 +0,0 @@ -The code in this directory is the old mga_vid driver for Linux kernels -prior to 2.6. It does _not_ compile for version 2.6.x. - -For Linux kernel 2.6.x please get the newest version of the 2.6 port from -http://attila.kinali.ch/mga/ - - -mga_vid - MGA G200/G400 YUV Overlay kernel module - - Author: - Aaron Holtzman , Oct 1999 - - Contributions by: - Fredrik Vraalsen - Alan Cox - - WARNING ----- WARNING - -This code messes with your video card and your X server. It will probably -lock up your box, format your hard drive, and cause your brand new G400 -MAX to spout 6 inch flames. You have been warned. - - WARNING ----- WARNING - -What does this code do? - - mga_vid is a kernel module that utilitizes the Matrox G200/G400/G550 - video scaler/overlay unit to perform YUV->RGB colorspace conversion - and arbitrary video scaling. - - mga_vid is also a monster hack. - -How does mga_vid work? - - This kernel module sets up the BES (backend scaler) with appropriate - values based on parameters supplied via ioctl. It also maps a chunk of - video memory into userspace via mmap. This memory is stolen from X - (which may decide to write to it later). The application can then write - image data directly to the framebuffer (if it knows the right padding, - etc). - - -How do I know if mga_vid works on my system? - - There is a test application called mga_vid_test. This test code should - draw some nice 256x256 images for you if all is working well. diff --git a/drivers/generic_math.h b/drivers/generic_math.h deleted file mode 100644 index 00a0e976f8..0000000000 --- a/drivers/generic_math.h +++ /dev/null @@ -1,272 +0,0 @@ -/* - * generic implementation of sin(x) and cos(x) functions specially for Linux - * Copyright (C) 2002 Nick Kurshev - * - * This file is part of MPlayer. - * - * MPlayer is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * MPlayer is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with MPlayer; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. - */ - -#ifndef MPLAYER_GENERIC_MATH_H -#define MPLAYER_GENERIC_MATH_H - -typedef struct gen_sincos -{ - double x; - double sinx; - double cosx; -}gen_sincos_t; - -static gen_sincos_t g_sincos[201] = { -{ -3.141600e+00, 7.346410e-06, -1.000000e-00 }, -{ -3.110184e+00, -3.140349e-02, -9.995068e-01 }, -{ -3.078768e+00, -6.278333e-02, -9.980272e-01 }, -{ -3.047352e+00, -9.410122e-02, -9.955626e-01 }, -{ -3.015936e+00, -1.253262e-01, -9.921156e-01 }, -{ -2.984520e+00, -1.564276e-01, -9.876894e-01 }, -{ -2.953104e+00, -1.873745e-01, -9.822885e-01 }, -{ -2.921688e+00, -2.181366e-01, -9.759183e-01 }, -{ -2.890272e+00, -2.486833e-01, -9.685848e-01 }, -{ -2.858856e+00, -2.789847e-01, -9.602956e-01 }, -{ -2.827440e+00, -3.090107e-01, -9.510586e-01 }, -{ -2.796024e+00, -3.387318e-01, -9.408830e-01 }, -{ -2.764608e+00, -3.681185e-01, -9.297789e-01 }, -{ -2.733192e+00, -3.971420e-01, -9.177572e-01 }, -{ -2.701776e+00, -4.257736e-01, -9.048297e-01 }, -{ -2.670360e+00, -4.539849e-01, -8.910094e-01 }, -{ -2.638944e+00, -4.817483e-01, -8.763097e-01 }, -{ -2.607528e+00, -5.090362e-01, -8.607451e-01 }, -{ -2.576112e+00, -5.358217e-01, -8.443312e-01 }, -{ -2.544696e+00, -5.620785e-01, -8.270839e-01 }, -{ -2.513280e+00, -5.877805e-01, -8.090204e-01 }, -{ -2.481864e+00, -6.129025e-01, -7.901586e-01 }, -{ -2.450448e+00, -6.374196e-01, -7.705169e-01 }, -{ -2.419032e+00, -6.613076e-01, -7.501148e-01 }, -{ -2.387616e+00, -6.845430e-01, -7.289724e-01 }, -{ -2.356200e+00, -7.071029e-01, -7.071107e-01 }, -{ -2.324784e+00, -7.289649e-01, -6.845511e-01 }, -{ -2.293368e+00, -7.501075e-01, -6.613159e-01 }, -{ -2.261952e+00, -7.705099e-01, -6.374281e-01 }, -{ -2.230536e+00, -7.901518e-01, -6.129112e-01 }, -{ -2.199120e+00, -8.090140e-01, -5.877894e-01 }, -{ -2.167704e+00, -8.270777e-01, -5.620876e-01 }, -{ -2.136288e+00, -8.443252e-01, -5.358310e-01 }, -{ -2.104872e+00, -8.607395e-01, -5.090457e-01 }, -{ -2.073456e+00, -8.763043e-01, -4.817579e-01 }, -{ -2.042040e+00, -8.910044e-01, -4.539948e-01 }, -{ -2.010624e+00, -9.048251e-01, -4.257835e-01 }, -{ -1.979208e+00, -9.177528e-01, -3.971521e-01 }, -{ -1.947792e+00, -9.297748e-01, -3.681288e-01 }, -{ -1.916376e+00, -9.408793e-01, -3.387421e-01 }, -{ -1.884960e+00, -9.510552e-01, -3.090212e-01 }, -{ -1.853544e+00, -9.602925e-01, -2.789953e-01 }, -{ -1.822128e+00, -9.685821e-01, -2.486940e-01 }, -{ -1.790712e+00, -9.759158e-01, -2.181473e-01 }, -{ -1.759296e+00, -9.822865e-01, -1.873854e-01 }, -{ -1.727880e+00, -9.876877e-01, -1.564385e-01 }, -{ -1.696464e+00, -9.921142e-01, -1.253372e-01 }, -{ -1.665048e+00, -9.955616e-01, -9.411219e-02 }, -{ -1.633632e+00, -9.980265e-01, -6.279433e-02 }, -{ -1.602216e+00, -9.995064e-01, -3.141450e-02 }, -{ -1.570800e+00, -1.000000e-00, -3.673205e-06 }, -{ -1.539384e+00, -9.995067e-01, 3.140716e-02 }, -{ -1.507968e+00, -9.980269e-01, 6.278700e-02 }, -{ -1.476552e+00, -9.955623e-01, 9.410488e-02 }, -{ -1.445136e+00, -9.921151e-01, 1.253299e-01 }, -{ -1.413720e+00, -9.876889e-01, 1.564312e-01 }, -{ -1.382304e+00, -9.822879e-01, 1.873781e-01 }, -{ -1.350888e+00, -9.759175e-01, 2.181402e-01 }, -{ -1.319472e+00, -9.685839e-01, 2.486869e-01 }, -{ -1.288056e+00, -9.602945e-01, 2.789882e-01 }, -{ -1.256640e+00, -9.510574e-01, 3.090142e-01 }, -{ -1.225224e+00, -9.408817e-01, 3.387352e-01 }, -{ -1.193808e+00, -9.297775e-01, 3.681220e-01 }, -{ -1.162392e+00, -9.177557e-01, 3.971454e-01 }, -{ -1.130976e+00, -9.048282e-01, 4.257769e-01 }, -{ -1.099560e+00, -8.910077e-01, 4.539882e-01 }, -{ -1.068144e+00, -8.763079e-01, 4.817515e-01 }, -{ -1.036728e+00, -8.607433e-01, 5.090393e-01 }, -{ -1.005312e+00, -8.443292e-01, 5.358248e-01 }, -{ -9.738960e-01, -8.270819e-01, 5.620815e-01 }, -{ -9.424800e-01, -8.090183e-01, 5.877835e-01 }, -{ -9.110640e-01, -7.901563e-01, 6.129054e-01 }, -{ -8.796480e-01, -7.705146e-01, 6.374224e-01 }, -{ -8.482320e-01, -7.501124e-01, 6.613104e-01 }, -{ -8.168160e-01, -7.289699e-01, 6.845457e-01 }, -{ -7.854000e-01, -7.071081e-01, 7.071055e-01 }, -{ -7.539840e-01, -6.845484e-01, 7.289674e-01 }, -{ -7.225680e-01, -6.613131e-01, 7.501100e-01 }, -{ -6.911520e-01, -6.374252e-01, 7.705122e-01 }, -{ -6.597360e-01, -6.129083e-01, 7.901541e-01 }, -{ -6.283200e-01, -5.877864e-01, 8.090161e-01 }, -{ -5.969040e-01, -5.620845e-01, 8.270798e-01 }, -{ -5.654880e-01, -5.358279e-01, 8.443272e-01 }, -{ -5.340720e-01, -5.090425e-01, 8.607414e-01 }, -{ -5.026560e-01, -4.817547e-01, 8.763061e-01 }, -{ -4.712400e-01, -4.539915e-01, 8.910060e-01 }, -{ -4.398240e-01, -4.257802e-01, 9.048266e-01 }, -{ -4.084080e-01, -3.971488e-01, 9.177542e-01 }, -{ -3.769920e-01, -3.681254e-01, 9.297762e-01 }, -{ -3.455760e-01, -3.387387e-01, 9.408805e-01 }, -{ -3.141600e-01, -3.090177e-01, 9.510563e-01 }, -{ -2.827440e-01, -2.789917e-01, 9.602935e-01 }, -{ -2.513280e-01, -2.486905e-01, 9.685830e-01 }, -{ -2.199120e-01, -2.181437e-01, 9.759166e-01 }, -{ -1.884960e-01, -1.873817e-01, 9.822872e-01 }, -{ -1.570800e-01, -1.564348e-01, 9.876883e-01 }, -{ -1.256640e-01, -1.253335e-01, 9.921147e-01 }, -{ -9.424800e-02, -9.410853e-02, 9.955619e-01 }, -{ -6.283200e-02, -6.279067e-02, 9.980267e-01 }, -{ -3.141600e-02, -3.141083e-02, 9.995066e-01 }, -{ 0.000000e+00, 0.000000e+00, 1.000000e+00 }, -{ 3.141600e-02, 3.141083e-02, 9.995066e-01 }, -{ 6.283200e-02, 6.279067e-02, 9.980267e-01 }, -{ 9.424800e-02, 9.410853e-02, 9.955619e-01 }, -{ 1.256640e-01, 1.253335e-01, 9.921147e-01 }, -{ 1.570800e-01, 1.564348e-01, 9.876883e-01 }, -{ 1.884960e-01, 1.873817e-01, 9.822872e-01 }, -{ 2.199120e-01, 2.181437e-01, 9.759166e-01 }, -{ 2.513280e-01, 2.486905e-01, 9.685830e-01 }, -{ 2.827440e-01, 2.789917e-01, 9.602935e-01 }, -{ 3.141600e-01, 3.090177e-01, 9.510563e-01 }, -{ 3.455760e-01, 3.387387e-01, 9.408805e-01 }, -{ 3.769920e-01, 3.681254e-01, 9.297762e-01 }, -{ 4.084080e-01, 3.971488e-01, 9.177542e-01 }, -{ 4.398240e-01, 4.257802e-01, 9.048266e-01 }, -{ 4.712400e-01, 4.539915e-01, 8.910060e-01 }, -{ 5.026560e-01, 4.817547e-01, 8.763061e-01 }, -{ 5.340720e-01, 5.090425e-01, 8.607414e-01 }, -{ 5.654880e-01, 5.358279e-01, 8.443272e-01 }, -{ 5.969040e-01, 5.620845e-01, 8.270798e-01 }, -{ 6.283200e-01, 5.877864e-01, 8.090161e-01 }, -{ 6.597360e-01, 6.129083e-01, 7.901541e-01 }, -{ 6.911520e-01, 6.374252e-01, 7.705122e-01 }, -{ 7.225680e-01, 6.613131e-01, 7.501100e-01 }, -{ 7.539840e-01, 6.845484e-01, 7.289674e-01 }, -{ 7.854000e-01, 7.071081e-01, 7.071055e-01 }, -{ 8.168160e-01, 7.289699e-01, 6.845457e-01 }, -{ 8.482320e-01, 7.501124e-01, 6.613104e-01 }, -{ 8.796480e-01, 7.705146e-01, 6.374224e-01 }, -{ 9.110640e-01, 7.901563e-01, 6.129054e-01 }, -{ 9.424800e-01, 8.090183e-01, 5.877835e-01 }, -{ 9.738960e-01, 8.270819e-01, 5.620815e-01 }, -{ 1.005312e+00, 8.443292e-01, 5.358248e-01 }, -{ 1.036728e+00, 8.607433e-01, 5.090393e-01 }, -{ 1.068144e+00, 8.763079e-01, 4.817515e-01 }, -{ 1.099560e+00, 8.910077e-01, 4.539882e-01 }, -{ 1.130976e+00, 9.048282e-01, 4.257769e-01 }, -{ 1.162392e+00, 9.177557e-01, 3.971454e-01 }, -{ 1.193808e+00, 9.297775e-01, 3.681220e-01 }, -{ 1.225224e+00, 9.408817e-01, 3.387352e-01 }, -{ 1.256640e+00, 9.510574e-01, 3.090142e-01 }, -{ 1.288056e+00, 9.602945e-01, 2.789882e-01 }, -{ 1.319472e+00, 9.685839e-01, 2.486869e-01 }, -{ 1.350888e+00, 9.759175e-01, 2.181402e-01 }, -{ 1.382304e+00, 9.822879e-01, 1.873781e-01 }, -{ 1.413720e+00, 9.876889e-01, 1.564312e-01 }, -{ 1.445136e+00, 9.921151e-01, 1.253299e-01 }, -{ 1.476552e+00, 9.955623e-01, 9.410488e-02 }, -{ 1.507968e+00, 9.980269e-01, 6.278700e-02 }, -{ 1.539384e+00, 9.995067e-01, 3.140716e-02 }, -{ 1.570800e+00, 1.000000e-00, -3.673205e-06 }, -{ 1.602216e+00, 9.995064e-01, -3.141450e-02 }, -{ 1.633632e+00, 9.980265e-01, -6.279433e-02 }, -{ 1.665048e+00, 9.955616e-01, -9.411219e-02 }, -{ 1.696464e+00, 9.921142e-01, -1.253372e-01 }, -{ 1.727880e+00, 9.876877e-01, -1.564385e-01 }, -{ 1.759296e+00, 9.822865e-01, -1.873854e-01 }, -{ 1.790712e+00, 9.759158e-01, -2.181473e-01 }, -{ 1.822128e+00, 9.685821e-01, -2.486940e-01 }, -{ 1.853544e+00, 9.602925e-01, -2.789953e-01 }, -{ 1.884960e+00, 9.510552e-01, -3.090212e-01 }, -{ 1.916376e+00, 9.408793e-01, -3.387421e-01 }, -{ 1.947792e+00, 9.297748e-01, -3.681288e-01 }, -{ 1.979208e+00, 9.177528e-01, -3.971521e-01 }, -{ 2.010624e+00, 9.048251e-01, -4.257835e-01 }, -{ 2.042040e+00, 8.910044e-01, -4.539948e-01 }, -{ 2.073456e+00, 8.763043e-01, -4.817579e-01 }, -{ 2.104872e+00, 8.607395e-01, -5.090457e-01 }, -{ 2.136288e+00, 8.443252e-01, -5.358310e-01 }, -{ 2.167704e+00, 8.270777e-01, -5.620876e-01 }, -{ 2.199120e+00, 8.090140e-01, -5.877894e-01 }, -{ 2.230536e+00, 7.901518e-01, -6.129112e-01 }, -{ 2.261952e+00, 7.705099e-01, -6.374281e-01 }, -{ 2.293368e+00, 7.501075e-01, -6.613159e-01 }, -{ 2.324784e+00, 7.289649e-01, -6.845511e-01 }, -{ 2.356200e+00, 7.071029e-01, -7.071107e-01 }, -{ 2.387616e+00, 6.845430e-01, -7.289724e-01 }, -{ 2.419032e+00, 6.613076e-01, -7.501148e-01 }, -{ 2.450448e+00, 6.374196e-01, -7.705169e-01 }, -{ 2.481864e+00, 6.129025e-01, -7.901586e-01 }, -{ 2.513280e+00, 5.877805e-01, -8.090204e-01 }, -{ 2.544696e+00, 5.620785e-01, -8.270839e-01 }, -{ 2.576112e+00, 5.358217e-01, -8.443312e-01 }, -{ 2.607528e+00, 5.090362e-01, -8.607451e-01 }, -{ 2.638944e+00, 4.817483e-01, -8.763097e-01 }, -{ 2.670360e+00, 4.539849e-01, -8.910094e-01 }, -{ 2.701776e+00, 4.257736e-01, -9.048297e-01 }, -{ 2.733192e+00, 3.971420e-01, -9.177572e-01 }, -{ 2.764608e+00, 3.681185e-01, -9.297789e-01 }, -{ 2.796024e+00, 3.387318e-01, -9.408830e-01 }, -{ 2.827440e+00, 3.090107e-01, -9.510586e-01 }, -{ 2.858856e+00, 2.789847e-01, -9.602956e-01 }, -{ 2.890272e+00, 2.486833e-01, -9.685848e-01 }, -{ 2.921688e+00, 2.181366e-01, -9.759183e-01 }, -{ 2.953104e+00, 1.873745e-01, -9.822885e-01 }, -{ 2.984520e+00, 1.564276e-01, -9.876894e-01 }, -{ 3.015936e+00, 1.253262e-01, -9.921156e-01 }, -{ 3.047352e+00, 9.410122e-02, -9.955626e-01 }, -{ 3.078768e+00, 6.278333e-02, -9.980272e-01 }, -{ 3.110184e+00, 3.140349e-02, -9.995068e-01 }, -{ 3.141600e+00, -7.346410e-06, -1.000000e-00 } -}; - -#define M_PI 3.14159265358979323846 /* pi */ - -static double inline gen_sin(double x) -{ - int i; - if(x < 0) while(x < -M_PI) x+= M_PI; - else while(x > M_PI) x-= M_PI; - for(i=0;i=g_sincos[i].x && x <= g_sincos[i+1].x) - { - return (g_sincos[i+1].sinx-g_sincos[i].sinx)*(x-g_sincos[i].x)/(g_sincos[i+1].x-g_sincos[i].x)+g_sincos[i].sinx; - } - } - return x<0?1:-1; -} -#undef sin -#define sin(x) gen_sin(x) - -static double inline gen_cos(double x) -{ - int i; - if(x < 0) while(x < -M_PI) x+= M_PI; - else while(x > M_PI) x-= M_PI; - for(i=0;i=g_sincos[i].x && x <= g_sincos[i+1].x) - { - return (g_sincos[i+1].cosx-g_sincos[i].cosx)*(x-g_sincos[i].x)/(g_sincos[i+1].x-g_sincos[i].x)+g_sincos[i].cosx; - } - } - return x<0?1:-1; -} -#undef cos -#define cos(x) gen_cos(x) - -#endif /* MPLAYER_GENERIC_MATH_H */ diff --git a/drivers/hacking.ati b/drivers/hacking.ati deleted file mode 100644 index 20c9bfa8ea..0000000000 --- a/drivers/hacking.ati +++ /dev/null @@ -1,313 +0,0 @@ - ATI chips hacking - ================= - Dedicated to ATI's hackers. - -Preface -~~~~~~~ -This document will compare ATI chips only from point of DAC and video overlay. -There are lots of difference from 3D point, dual-head support, tv-out support -and many other things but it's already perfectly different story. -This document doesn't include information about ATI AIW (All In Wonder) chips. - -What are units on modern ATI chips: -DAC - (Digital to Analog Convertor) controls CRTC, LCD, DFP monitor's output - Consists from: - PLL - (Programable line length) registers - CRTC - CRT controller - LCD/DFP scaler - surface control -DAC2 - controls CRTC, LCD, DFP monitor's output on second head -TVDAC - controls Composite Video and Super Video output ports - Consists from: - TV_PLL - TV scaler & sync unit - TV format convertor (PAL/NTSC) -TVCAP - controls Video-In port -MPP - Miscellaneous peripheral port. (includes macrovision's filter - copy - protection mechanism) -OV - Video overlay (YUV BES) (include subpictures, gamma correction and - adaptive deinterlacing) -CAP0 - Video capturing -CAP1 - Video capturing (second unit) -RT - Rage theatre: video encoding and mixing -MUX - video muxer -MEM - PCI/AGP bus mastering -2D - GUI engine -3D - 3D-OpenGL engine (There are lots of stuff) -I2C - I2C Bus control - -This document is mainly related only with OV unit ;) -Video decoding diagram: - -RAM memory: [ App ] Copies YUV image to overlay memory - | <-- (It's possible to program DMA here) -overlay memory:[ OV ] performs scaling and YUVtoRGB convertion - /\ -RGB memory: / \ - / [ macrovision ] performs copy protection filtering - / \ (unneeded but presented by default thing;) - [ CRTC/LCD/DFP DAC ] [ TV DAC ] convert RGB memory to CRTC and NTSC/PAL signals - | | - [CRTC/LCD/DFP Monitor] [TV-screen] - -History -~~~~~~~ - What is history of ATI's chips? I can be wrong but below is my vision -of this question: - -0. I don't know any earlied chips :( -1. Mach8 -2. Mach16 -3. Mach32 - -4. Mach64. - It's first chip which has support from side of open - source drivers. Set of mach64 chips is: - mach64GX (ATI888GX00) - mach64CX (ATI888CX00) - mach64CT (ATI264CT) - mach64ET (ATI264ET) - mach64VTA3 (ATI264VT) - mach64VTA4 (ATI264VT) - mach64VTB (ATI264VTB) - mach64VT4 (ATI264VT4) - -5. 3D rage chips. - It seems that these chips have fully compatible by GPU with Mach64 - which is extended by 3D possibilities. Set of 3D rage chips is: - 3D RAGE (GT) - 3D RAGE II+ (GTB) - 3D RAGE IIC (PCI) - 3D RAGE IIC (AGP) - 3D RAGE LT - 3D RAGE LT-G - 3D RAGE PRO (BGA, AGP) - 3D RAGE PRO (BGA, AGP, 1x only) - 3D RAGE PRO (BGA, PCI) - 3D RAGE PRO (PQFP, PCI) - 3D RAGE PRO (PQFP, PCI, limited 3D) - 3D RAGE (XL) - 3D RAGE LT PRO (AGP) - 3D RAGE LT PRO (PCI) - 3D RAGE Mobility (PCI) - 3D RAGE Mobility (AGP) - -6. Rage128 chips. - These chips have perfectly new GPU which supports memory mapped IO - space for accelerating port access (It's main cause of incompatibility - with mach64). Set of Rage128 chips is: - Rage128 GL RE - Rage128 GL RF - Rage128 GL RG - Rage128 GL RH - Rage128 GL RI - Rage128 VR RK - Rage128 VR RL - Rage128 VR RM - Rage128 VR RN - Rage128 VR RO - Rage128 Mobility M3 LE - Rage128 Mobility M3 LF -7. Rage128Pro chips. - These chips are successors of Rage128 ones. - Rage128Pro GL PA - Rage128Pro GL PB - Rage128Pro GL PC - Rage128Pro GL PD - Rage128Pro GL PE - Rage128Pro GL PF - Rage128Pro VR PG - Rage128Pro VR PH - Rage128Pro VR PI - Rage128Pro VR PJ - Rage128Pro VR PK - Rage128Pro VR PL - Rage128Pro VR PM - Rage128Pro VR PN - Rage128Pro VR PO - Rage128Pro VR PP - Rage128Pro VR PQ - Rage128Pro VR PR - Rage128Pro VR TR - Rage128Pro VR PS - Rage128Pro VR PT - Rage128Pro VR PU - Rage128Pro VR PV - Rage128Pro VR PW - Rage128Pro VR PX - Rage128Pro Ultra U1 - Rage128Pro Ultra U2 - Rage128Pro Ultra U3 - -8. Radeon chips. - Indeed they could be named Rage256 Pro. (With minor changes is fully - compatible with Rage128 chips). - Radeon QD - Radeon QE - Radeon QF - Radeon QG - Radeon VE QY - Radeon VE QZ - Radeon M6 LY - Radeon M6 LZ - Radeon M7 LW -9. Radeon2 chips. - Indeed they could be named Rage512 Pro. - Radeon2 8500 QL - Radeon2 7500 QW - -10. Radeon3 and newest are cooming soon, but I hope that they will be fully - compatible with Radeon1 chips. - -In Radeon famility there were introduced also FX chips: Radeon FX and -Radeon2 8700 FX. Probably they have the same possibility as other Radeon -but currently it's unknown for me. - -What about video overlay and DAC? -~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - -Currently it's known that there is only difference between -Mach64 and Rage128 compatible chips: -- They have different logic of io ports programming! -- They are incompatible by port numbers! -But: -- They use the same program logic from register's name point. -(Indeed exists slight difference even between Radeon and Rage128 -chips. AFAIK only Radeon has OV0_SLICE_CNTL register which currently -is not used by driver. But I know only its name ;). Also there -is difference in slight adjust of BES position but it's configured -by #ifdef blocks). - -Please compare: - -(The piece of Back-End Scaler programming) - - Sample for Mach64 compatible chips: - *********************************** - -#define SPARSE_IO_BASE 0x03fcu -#define SPARSE_IO_SELECT 0xfc00u - -#define BLOCK_IO_BASE 0xff00u -#define BLOCK_IO_SELECT 0x00fcu - -#define MM_IO_SELECT 0x03fcu -#define BLOCK_SELECT 0x0400u -#define DWORD_SELECT (BLOCK_SELECT | MM_IO_SELECT) - -#define IO_BYTE_SELECT 0x0003u - -#define SPARSE_IO_PORT (SPARSE_IO_BASE | IO_BYTE_SELECT) -#define BLOCK_IO_PORT (BLOCK_IO_BASE | IO_BYTE_SELECT) - -#define IOPortTag(_SparseIOSelect, _BlockIOSelect) \ - (SetBits(_SparseIOSelect, SPARSE_IO_SELECT) | \ - SetBits(_BlockIOSelect, BLOCK_SELECT | MM_IO_SELECT)) -#define SparseIOTag(_IOSelect) IOPortTag(_IOSelect, 0) -#define BlockIOTag(_IOSelect) IOPortTag(0, _IOSelect) - -... - -#define OVERLAY_Y_X_START BlockIOTag(0x100u) -#define OVERLAY_Y_X_END BlockIOTag(0x101u) - -... - -#define OUTREG(_Register, _Value) \ - MMIO_OUT32(pATI->pBlock[GetBits(_Register, BLOCK_SELECT)], \ - (_Register) & MM_IO_SELECT, _Value) - -... - -OUTREG(OVERLAY_Y_X_START,((drw_x)<<16)|(drw_y)|(1<<31)); -OUTREG(OVERLAY_Y_X_END,((drw_x+drw_w)<<16)|(drw_y+drw_h)); - - - Sample for Rage128 compatible chips: - ************************************ - -#define OV0_Y_X_START 0x0400 -#define OV0_Y_X_END 0x0404 - -... - -#define INREG(addr) readl((rage_mmio_base)+addr) -#define OUTREG(addr,val) writel(val, (rage_mmio_base)+addr) - -... - -rage_mmio_base = ioremap_nocache(pci_resource_start (dev, 2),RAGE_REGSIZE); - -... - -#ifdef RADEON -#define X_ADJUST 8 -#else /* rage128 */ -#define X_ADJUST 0 -#endif - -OUTREG(OV0_Y_X_START,(drw_x+X_ADJUST)|(drw_y<<16)); -OUTREG(OV0_Y_X_END,(drw_x+drw_w+X_ADJUST)|(drw_y+drw_h)<<16)); - -Thus - these chips have almost the same logic from register's name point. -(except the fact that they have swapped 16-bit halfs). -Yes - programming of Rage128 is much simpler of Mach64. - - -What about other ATI's chips? -~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - -I suggest you have latest copy of GATOS-CVS: -http://www.linuxvideo.org -GATOS was designed and introduced as General ATI TV and Overlay Sowfware. -You will be able to find out there a lots of useful hacking utilities -(at location gatos-ati/gatos): -gfxdump - Program for dumping graphics chips registers on Linux and Windows 9X. - (it's more useful for Win9x to hack their values). -xatitv - For working with tv-in (currently is under hard development) -atitvout- For working with tv-out -and lot of other stuff. -BUT: After studing of Gatos and X11 stuffs I've found that they are bad -optimized for movie playback. -Please compare: - radeon_vid - configures video overlay only once and provides DGA to it. - (doesn't require to be MMX optimized) - gatos and X11 - configures video overlay at every slice of frame, then - performs unoptimized copying of source stuff to video memory - often with using CopyMungedData (it's C-analog of YV12_to_YUY2) - since there are lacks in yv12 support. - (is not MMX optimized that's gladly accepted, but probably - will be never optimized due portability). - -hardware IDCT support diagram: -~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - | -[ Video parser ] <---------- [ Transport demuxing ] --> [ Audio ] - | | | -[ Variable length decoder] |D | - | |V | -[ Inverse quantization ] |D | - | | | --------|---[ video card ]---------+ |s | - | | |u | -[ Run level decode & de-zigzag ] | |b | - | | |p | -[ IDCT ] | |i | - | | |c | -[ Motion compensation ] | |t | - | | |u | -[ Advanced deinterlacing ] | |r | - | | |e | -[ Filtered X-Y scaling ] [SUBPIC]-|-----+s [ OSD ] - | | | | | -[ 4-bit alpha blending ] <---+ | +-------+ - | | -[ YUV to RGB conversion ] | --------|--------------------------+ -TV-screen or CRT-display - - -Conslusion: -~~~~~~~~~~~ - -That's all folk! diff --git a/drivers/mga_vid.c b/drivers/mga_vid.c deleted file mode 100644 index de96aa1b0a..0000000000 --- a/drivers/mga_vid.c +++ /dev/null @@ -1,1778 +0,0 @@ -/* - * Matrox MGA G200/G400 YUV Video Interface module Version 0.1.0 - * BES == Back End Scaler - * - * Copyright (C) 1999 Aaron Holtzman - * - * Module skeleton based on gutted agpgart module by - * Jeff Hartmann - * YUY2 support (see config.format) added by A'rpi/ESP-team - * double buffering added by A'rpi/ESP-team - * brightness/contrast introduced by eyck - * multiple card support by Attila Kinali - * - * This file is part of mga_vid. - * - * mga_vid is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * mga_vid is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with mga_vid; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. - */ - -//It's entirely possible this major conflicts with something else -//use the 'major' parameter to override the default major number (178) -/* mknod /dev/mga_vid c 178 0 */ - -//#define CRTC2 - -// Set this value, if autodetection fails! (video ram size in megabytes) -// #define MGA_MEMORY_SIZE 16 - -//#define MGA_ALLOW_IRQ - -#define MGA_VSYNC_POS 2 - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#if LINUX_VERSION_CODE < KERNEL_VERSION(2,4,10) -#include -#else -#include -#endif - -#include -#include -#include - -#include "mga_vid.h" - -#ifdef CONFIG_MTRR -#include -#endif - -#ifdef CONFIG_DEVFS_FS -#include -#endif - -#include -#include -#include - -#define TRUE 1 -#define FALSE 0 - -#define DEFAULT_MGA_VID_MAJOR 178 - -#ifndef PCI_DEVICE_ID_MATROX_G200_PCI -#define PCI_DEVICE_ID_MATROX_G200_PCI 0x0520 -#endif - -#ifndef PCI_DEVICE_ID_MATROX_G200_AGP -#define PCI_DEVICE_ID_MATROX_G200_AGP 0x0521 -#endif - -#ifndef PCI_DEVICE_ID_MATROX_G400 -#define PCI_DEVICE_ID_MATROX_G400 0x0525 -#endif - -#ifndef PCI_DEVICE_ID_MATROX_G550 -#define PCI_DEVICE_ID_MATROX_G550 0x2527 -#endif - -#ifndef PCI_SUBSYSTEM_ID_MATROX_G400_DH_16MB -#define PCI_SUBSYSTEM_ID_MATROX_G400_DH_16MB 0x2159 -#endif - -#ifndef PCI_SUBSYSTEM_ID_MATROX_G400_16MB_SGRAM -#define PCI_SUBSYSTEM_ID_MATROX_G400_16MB_SGRAM 0x19d8 -#endif - -#ifndef PCI_SUBSYSTEM_ID_MATROX_G400_16MB_SDRAM -#define PCI_SUBSYSTEM_ID_MATROX_G400_16MB_SDRAM 0x0328 -#endif - -MODULE_AUTHOR("Aaron Holtzman "); -#ifdef MODULE_LICENSE -MODULE_LICENSE("GPL"); -#endif - -#define PARAM_BRIGHTNESS "brightness=" -#define PARAM_CONTRAST "contrast=" -#define PARAM_BLACKIE "blackie=" - -// set PARAM_BUFF_SIZE to just below 4k because some kernel versions -// store additional information in the memory page which leads to -// the allocation of an additional page if exactly 4k is used -#define PARAM_BUFF_SIZE 4000 - -#ifndef min -#define min(x,y) (((x)<(y))?(x):(y)) -#endif - -#if LINUX_VERSION_CODE < KERNEL_VERSION(2,4,0) -#include - -static unsigned long simple_strtoul(const char *cp,char **endp,unsigned int base) -{ - unsigned long result = 0,value; - - if (!base) { - base = 10; - if (*cp == '0') { - base = 8; - cp++; - if ((*cp == 'x') && isxdigit(cp[1])) { - cp++; - base = 16; - } - } - } - while (isxdigit(*cp) && (value = isdigit(*cp) ? *cp-'0' : (islower(*cp) - ? toupper(*cp) : *cp)-'A'+10) < base) { - result = result*base + value; - cp++; - } - if (endp) - *endp = (char *)cp; - return result; -} - -static long simple_strtol(const char *cp,char **endp,unsigned int base) -{ - if(*cp=='-') - return -simple_strtoul(cp+1,endp,base); - return simple_strtoul(cp,endp,base); -} -#endif - - -typedef struct bes_registers_s -{ - //BES Control - uint32_t besctl; - //BES Global control - uint32_t besglobctl; - //Luma control (brightness and contrast) - uint32_t beslumactl; - //Line pitch - uint32_t bespitch; - - //Buffer A-1 Chroma 3 plane org - uint32_t besa1c3org; - //Buffer A-1 Chroma org - uint32_t besa1corg; - //Buffer A-1 Luma org - uint32_t besa1org; - - //Buffer A-2 Chroma 3 plane org - uint32_t besa2c3org; - //Buffer A-2 Chroma org - uint32_t besa2corg; - //Buffer A-2 Luma org - uint32_t besa2org; - - //Buffer B-1 Chroma 3 plane org - uint32_t besb1c3org; - //Buffer B-1 Chroma org - uint32_t besb1corg; - //Buffer B-1 Luma org - uint32_t besb1org; - - //Buffer B-2 Chroma 3 plane org - uint32_t besb2c3org; - //Buffer B-2 Chroma org - uint32_t besb2corg; - //Buffer B-2 Luma org - uint32_t besb2org; - - //BES Horizontal coord - uint32_t beshcoord; - //BES Horizontal inverse scaling [5.14] - uint32_t beshiscal; - //BES Horizontal source start [10.14] (for scaling) - uint32_t beshsrcst; - //BES Horizontal source ending [10.14] (for scaling) - uint32_t beshsrcend; - //BES Horizontal source last - uint32_t beshsrclst; - - - //BES Vertical coord - uint32_t besvcoord; - //BES Vertical inverse scaling [5.14] - uint32_t besviscal; - //BES Field 1 vertical source last position - uint32_t besv1srclst; - //BES Field 1 weight start - uint32_t besv1wght; - //BES Field 2 vertical source last position - uint32_t besv2srclst; - //BES Field 2 weight start - uint32_t besv2wght; - - - //configurable stuff - int blackie; - -} bes_registers_t; - -#ifdef CRTC2 -typedef struct crtc2_registers_s -{ - uint32_t c2ctl; - uint32_t c2datactl; - uint32_t c2misc; - uint32_t c2hparam; - uint32_t c2hsync; - uint32_t c2offset; - uint32_t c2pl2startadd0; - uint32_t c2pl2startadd1; - uint32_t c2pl3startadd0; - uint32_t c2pl3startadd1; - uint32_t c2preload; - uint32_t c2spicstartadd0; - uint32_t c2spicstartadd1; - uint32_t c2startadd0; - uint32_t c2startadd1; - uint32_t c2subpiclut; - uint32_t c2vcount; - uint32_t c2vparam; - uint32_t c2vsync; -} crtc2_registers_t; -#endif - - - - - -//All register offsets are converted to word aligned offsets (32 bit) -//because we want all our register accesses to be 32 bits -#define VCOUNT 0x1e20 - -#define PALWTADD 0x3c00 // Index register for X_DATAREG port -#define X_DATAREG 0x3c0a - -#define XMULCTRL 0x19 -#define BPP_8 0x00 -#define BPP_15 0x01 -#define BPP_16 0x02 -#define BPP_24 0x03 -#define BPP_32_DIR 0x04 -#define BPP_32_PAL 0x07 - -#define XCOLMSK 0x40 -#define X_COLKEY 0x42 -#define XKEYOPMODE 0x51 -#define XCOLMSK0RED 0x52 -#define XCOLMSK0GREEN 0x53 -#define XCOLMSK0BLUE 0x54 -#define XCOLKEY0RED 0x55 -#define XCOLKEY0GREEN 0x56 -#define XCOLKEY0BLUE 0x57 - -#ifdef CRTC2 - -/*CRTC2 registers*/ -#define XMISCCTRL 0x1e -#define C2CTL 0x3c10 -#define C2DATACTL 0x3c4c -#define C2MISC 0x3c44 -#define C2HPARAM 0x3c14 -#define C2HSYNC 0x3c18 -#define C2OFFSET 0x3c40 -#define C2PL2STARTADD0 0x3c30 // like BESA1CORG -#define C2PL2STARTADD1 0x3c34 // like BESA2CORG -#define C2PL3STARTADD0 0x3c38 // like BESA1C3ORG -#define C2PL3STARTADD1 0x3c3c // like BESA2C3ORG -#define C2PRELOAD 0x3c24 -#define C2SPICSTARTADD0 0x3c54 -#define C2SPICSTARTADD1 0x3c58 -#define C2STARTADD0 0x3c28 // like BESA1ORG -#define C2STARTADD1 0x3c2c // like BESA2ORG -#define C2SUBPICLUT 0x3c50 -#define C2VCOUNT 0x3c48 -#define C2VPARAM 0x3c1c -#define C2VSYNC 0x3c20 - -#endif - -// Backend Scaler registers -#define BESCTL 0x3d20 -#define BESGLOBCTL 0x3dc0 -#define BESLUMACTL 0x3d40 -#define BESPITCH 0x3d24 - -#define BESA1C3ORG 0x3d60 -#define BESA1CORG 0x3d10 -#define BESA1ORG 0x3d00 - -#define BESA2C3ORG 0x3d64 -#define BESA2CORG 0x3d14 -#define BESA2ORG 0x3d04 - -#define BESB1C3ORG 0x3d68 -#define BESB1CORG 0x3d18 -#define BESB1ORG 0x3d08 - -#define BESB2C3ORG 0x3d6C -#define BESB2CORG 0x3d1C -#define BESB2ORG 0x3d0C - -#define BESHCOORD 0x3d28 -#define BESHISCAL 0x3d30 -#define BESHSRCEND 0x3d3C -#define BESHSRCLST 0x3d50 -#define BESHSRCST 0x3d38 -#define BESV1WGHT 0x3d48 -#define BESV2WGHT 0x3d4c -#define BESV1SRCLST 0x3d54 -#define BESV2SRCLST 0x3d58 -#define BESVISCAL 0x3d34 -#define BESVCOORD 0x3d2c -#define BESSTATUS 0x3dc4 - -#define CRTCX 0x1fd4 -#define CRTCD 0x1fd5 -#define IEN 0x1e1c -#define ICLEAR 0x1e18 -#define STATUS 0x1e14 - - -// global devfs handle for /dev/mga_vid -#ifdef CONFIG_DEVFS_FS -static devfs_handle_t dev_handle = NULL; -#endif - -// card local config -typedef struct mga_card_s { - -// local devfs handle for /dev/mga_vidX -#ifdef CONFIG_DEVFS_FS - devfs_handle_t dev_handle; -#endif - - uint8_t *param_buff; // buffer for read() - uint32_t param_buff_size; - uint32_t param_buff_len; - bes_registers_t regs; -#ifdef CRTC2 - crtc2_registers_t cregs; -#endif - uint32_t vid_in_use; - uint32_t is_g400; - uint32_t vid_src_ready; - uint32_t vid_overlay_on; - - uint8_t *mmio_base; - uint32_t mem_base; - int src_base; // YUV buffer position in video memory - uint32_t ram_size; // how much megabytes videoram we have - uint32_t top_reserved; // reserved space for console font (matroxfb + fastfont) - - int brightness; // initial brightness - int contrast; // initial contrast - - struct pci_dev *pci_dev; - - mga_vid_config_t config; - int configured; // set to 1 when the card is configured over ioctl - - int colkey_saved; - int colkey_on; - unsigned char colkey_color[4]; - unsigned char colkey_mask[4]; - - int irq; // = -1 - int next_frame; -} mga_card_t; - -#define MGA_MAX_CARDS 16 -// this is used as init value for the parameter arrays -// it should have exactly MGA_MAX_CARDS elements -#define MGA_MAX_CARDS_INIT_ARRAY {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} -static unsigned int mga_cards_num=0; -static mga_card_t * mga_cards[MGA_MAX_CARDS] = MGA_MAX_CARDS_INIT_ARRAY; - -// module parameters -static int major = DEFAULT_MGA_VID_MAJOR; -static int mga_ram_size[MGA_MAX_CARDS] = MGA_MAX_CARDS_INIT_ARRAY; -static int mga_brightness[MGA_MAX_CARDS] = MGA_MAX_CARDS_INIT_ARRAY; -static int mga_contrast[MGA_MAX_CARDS] = MGA_MAX_CARDS_INIT_ARRAY; -static int mga_top_reserved[MGA_MAX_CARDS] = MGA_MAX_CARDS_INIT_ARRAY; - -MODULE_PARM(mga_ram_size, "1-" __MODULE_STRING(MGA_MAX_CARDS) "i"); -MODULE_PARM(mga_top_reserved, "1-" __MODULE_STRING(MGA_MAX_CARDS) "i"); -MODULE_PARM(mga_brightness, "1-" __MODULE_STRING(MGA_MAX_CARDS) "i"); -MODULE_PARM(mga_contrast, "1-" __MODULE_STRING(MGA_MAX_CARDS) "i"); -MODULE_PARM(major, "i"); - -#ifdef CRTC2 -static void crtc2_frame_sel(mga_card_t * card, int frame) -{ -switch(frame) { -case 0: - card->cregs.c2pl2startadd0=card->regs.besa1corg; - card->cregs.c2pl3startadd0=card->regs.besa1c3org; - card->cregs.c2startadd0=card->regs.besa1org; - break; -case 1: - card->cregs.c2pl2startadd0=card->regs.besa2corg; - card->cregs.c2pl3startadd0=card->regs.besa2c3org; - card->cregs.c2startadd0=card->regs.besa2org; - break; -case 2: - card->cregs.c2pl2startadd0=card->regs.besb1corg; - card->cregs.c2pl3startadd0=card->regs.besb1c3org; - card->cregs.c2startadd0=card->regs.besb1org; - break; -case 3: - card->cregs.c2pl2startadd0=card->regs.besb2corg; - card->cregs.c2pl3startadd0=card->regs.besb2c3org; - card->cregs.c2startadd0=card->regs.besb2org; - break; -} - writel(card->cregs.c2startadd0, card->mmio_base + C2STARTADD0); - writel(card->cregs.c2pl2startadd0, card->mmio_base + C2PL2STARTADD0); - writel(card->cregs.c2pl3startadd0, card->mmio_base + C2PL3STARTADD0); -} -#endif - -static void mga_vid_frame_sel(mga_card_t * card, int frame) -{ - if ( card->irq != -1 ) { - card->next_frame=frame; - } else { - - //we don't need the vcount protection as we're only hitting - //one register (and it doesn't seem to be double buffered) - card->regs.besctl = (card->regs.besctl & ~0x07000000) + (frame << 25); - writel( card->regs.besctl, card->mmio_base + BESCTL ); - -// writel( card->regs.besglobctl + ((readl(card->mmio_base + VCOUNT)+2)<<16), - writel( card->regs.besglobctl + (MGA_VSYNC_POS<<16), - card->mmio_base + BESGLOBCTL); -#ifdef CRTC2 - crtc2_frame_sel(card, frame); -#endif - - } -} - - -static void mga_vid_write_regs(mga_card_t * card, int restore) -{ - //Make sure internal registers don't get updated until we're done - writel( (readl(card->mmio_base + VCOUNT)-1)<<16, - card->mmio_base + BESGLOBCTL); - - // color or coordinate keying - - if(restore && card->colkey_saved){ - // restore it - card->colkey_saved=0; - -#ifdef MP_DEBUG - printk("mga_vid: Restoring colorkey (ON: %d %02X:%02X:%02X)\n", - card->colkey_on,card->colkey_color[0],card->colkey_color[1],card->colkey_color[2]); -#endif - - // Set color key registers: - writeb( XKEYOPMODE, card->mmio_base + PALWTADD); - writeb( card->colkey_on, card->mmio_base + X_DATAREG); - - writeb( XCOLKEY0RED, card->mmio_base + PALWTADD); - writeb( card->colkey_color[0], card->mmio_base + X_DATAREG); - writeb( XCOLKEY0GREEN, card->mmio_base + PALWTADD); - writeb( card->colkey_color[1], card->mmio_base + X_DATAREG); - writeb( XCOLKEY0BLUE, card->mmio_base + PALWTADD); - writeb( card->colkey_color[2], card->mmio_base + X_DATAREG); - writeb( X_COLKEY, card->mmio_base + PALWTADD); - writeb( card->colkey_color[3], card->mmio_base + X_DATAREG); - - writeb( XCOLMSK0RED, card->mmio_base + PALWTADD); - writeb( card->colkey_mask[0], card->mmio_base + X_DATAREG); - writeb( XCOLMSK0GREEN, card->mmio_base + PALWTADD); - writeb( card->colkey_mask[1], card->mmio_base + X_DATAREG); - writeb( XCOLMSK0BLUE, card->mmio_base + PALWTADD); - writeb( card->colkey_mask[2], card->mmio_base + X_DATAREG); - writeb( XCOLMSK, card->mmio_base + PALWTADD); - writeb( card->colkey_mask[3], card->mmio_base + X_DATAREG); - - } else if(!card->colkey_saved){ - // save it - card->colkey_saved=1; - // Get color key registers: - writeb( XKEYOPMODE, card->mmio_base + PALWTADD); - card->colkey_on=(unsigned char)readb(card->mmio_base + X_DATAREG) & 1; - - writeb( XCOLKEY0RED, card->mmio_base + PALWTADD); - card->colkey_color[0]=(unsigned char)readb(card->mmio_base + X_DATAREG); - writeb( XCOLKEY0GREEN, card->mmio_base + PALWTADD); - card->colkey_color[1]=(unsigned char)readb(card->mmio_base + X_DATAREG); - writeb( XCOLKEY0BLUE, card->mmio_base + PALWTADD); - card->colkey_color[2]=(unsigned char)readb(card->mmio_base + X_DATAREG); - writeb( X_COLKEY, card->mmio_base + PALWTADD); - card->colkey_color[3]=(unsigned char)readb(card->mmio_base + X_DATAREG); - - writeb( XCOLMSK0RED, card->mmio_base + PALWTADD); - card->colkey_mask[0]=(unsigned char)readb(card->mmio_base + X_DATAREG); - writeb( XCOLMSK0GREEN, card->mmio_base + PALWTADD); - card->colkey_mask[1]=(unsigned char)readb(card->mmio_base + X_DATAREG); - writeb( XCOLMSK0BLUE, card->mmio_base + PALWTADD); - card->colkey_mask[2]=(unsigned char)readb(card->mmio_base + X_DATAREG); - writeb( XCOLMSK, card->mmio_base + PALWTADD); - card->colkey_mask[3]=(unsigned char)readb(card->mmio_base + X_DATAREG); - -#ifdef MP_DEBUG - printk("mga_vid: Saved colorkey (ON: %d %02X:%02X:%02X)\n", - card->colkey_on, card->colkey_color[0], card->colkey_color[1], card->colkey_color[2]); -#endif - - } - - if(!restore){ - writeb( XKEYOPMODE, card->mmio_base + PALWTADD); - writeb( card->config.colkey_on, card->mmio_base + X_DATAREG); - if ( card->config.colkey_on ) - { - uint32_t r=0, g=0, b=0; - - writeb( XMULCTRL, card->mmio_base + PALWTADD); - switch (readb (card->mmio_base + X_DATAREG)) - { - case BPP_8: - /* Need to look up the color index, just using color 0 for now. */ - break; - - case BPP_15: - r = card->config.colkey_red >> 3; - g = card->config.colkey_green >> 3; - b = card->config.colkey_blue >> 3; - break; - - case BPP_16: - r = card->config.colkey_red >> 3; - g = card->config.colkey_green >> 2; - b = card->config.colkey_blue >> 3; - break; - - case BPP_24: - case BPP_32_DIR: - case BPP_32_PAL: - r = card->config.colkey_red; - g = card->config.colkey_green; - b = card->config.colkey_blue; - break; - } - - // Disable color keying on alpha channel - writeb( XCOLMSK, card->mmio_base + PALWTADD); - writeb( 0x00, card->mmio_base + X_DATAREG); - writeb( X_COLKEY, card->mmio_base + PALWTADD); - writeb( 0x00, card->mmio_base + X_DATAREG); - - - // Set up color key registers - writeb( XCOLKEY0RED, card->mmio_base + PALWTADD); - writeb( r, card->mmio_base + X_DATAREG); - writeb( XCOLKEY0GREEN, card->mmio_base + PALWTADD); - writeb( g, card->mmio_base + X_DATAREG); - writeb( XCOLKEY0BLUE, card->mmio_base + PALWTADD); - writeb( b, card->mmio_base + X_DATAREG); - - // Set up color key mask registers - writeb( XCOLMSK0RED, card->mmio_base + PALWTADD); - writeb( 0xff, card->mmio_base + X_DATAREG); - writeb( XCOLMSK0GREEN, card->mmio_base + PALWTADD); - writeb( 0xff, card->mmio_base + X_DATAREG); - writeb( XCOLMSK0BLUE, card->mmio_base + PALWTADD); - writeb( 0xff, card->mmio_base + X_DATAREG); - } - } - - // Backend Scaler - writel( card->regs.besctl, card->mmio_base + BESCTL); - if(card->is_g400) - writel( card->regs.beslumactl, card->mmio_base + BESLUMACTL); - writel( card->regs.bespitch, card->mmio_base + BESPITCH); - - writel( card->regs.besa1org, card->mmio_base + BESA1ORG); - writel( card->regs.besa1corg, card->mmio_base + BESA1CORG); - writel( card->regs.besa2org, card->mmio_base + BESA2ORG); - writel( card->regs.besa2corg, card->mmio_base + BESA2CORG); - writel( card->regs.besb1org, card->mmio_base + BESB1ORG); - writel( card->regs.besb1corg, card->mmio_base + BESB1CORG); - writel( card->regs.besb2org, card->mmio_base + BESB2ORG); - writel( card->regs.besb2corg, card->mmio_base + BESB2CORG); - if(card->is_g400) - { - writel( card->regs.besa1c3org, card->mmio_base + BESA1C3ORG); - writel( card->regs.besa2c3org, card->mmio_base + BESA2C3ORG); - writel( card->regs.besb1c3org, card->mmio_base + BESB1C3ORG); - writel( card->regs.besb2c3org, card->mmio_base + BESB2C3ORG); - } - - writel( card->regs.beshcoord, card->mmio_base + BESHCOORD); - writel( card->regs.beshiscal, card->mmio_base + BESHISCAL); - writel( card->regs.beshsrcst, card->mmio_base + BESHSRCST); - writel( card->regs.beshsrcend, card->mmio_base + BESHSRCEND); - writel( card->regs.beshsrclst, card->mmio_base + BESHSRCLST); - - writel( card->regs.besvcoord, card->mmio_base + BESVCOORD); - writel( card->regs.besviscal, card->mmio_base + BESVISCAL); - - writel( card->regs.besv1srclst, card->mmio_base + BESV1SRCLST); - writel( card->regs.besv1wght, card->mmio_base + BESV1WGHT); - writel( card->regs.besv2srclst, card->mmio_base + BESV2SRCLST); -