Move files from radeon/ subdirectory here.

git-svn-id: svn://svn.mplayerhq.hu/mplayer/trunk@22709 b3059339-0415-0410-9bf9-f77b7e298cf2

6 files changed, 0 insertions, 4399 deletions

diff --git a/drivers/radeon/README b/drivers/radeon/README
deleted file mode 100644
index 640107f56c..0000000000
--- a/drivers/radeon/README
+++ /dev/null
@@ -1,121 +0,0 @@
-	framebuffer driver for ATI Radeon chipset video boards
-	======================================================
-
-These files are replacement for linux-2.4.x-ac.y drivers.
-To use this driver you should have at least linux-2.4.5-ac.1
-then simply replace linux/drivers/video/radeon* with files
-from this directory.
-Note: since linux-2.4.10 this driver was moved from -ac to
-Linus distribution.
-
-Alternative way:
-~~~~~~~~~~~~~~~~
-Simply type two commands in this directory:
-make
-make install
-
-Anyway you should have 'framebuffer support' compiled into linux-kernel
-and at least '8bpp packed pixel support' compiled and installed as module.
-(But if you plan to use this module with MPlayer you also should have
-16bpp, 24bpp and 32bpp pixel support compiled as modules).
-
-
-                      Radeon video overlay
-		      ====================
-
-It was designed for MPlayer and currently can be used only by MPlayer.
-It's RGB-YUV BES for Radeon cards (althrough there is experimental
-support for Rage128 / Rage128pro chips).
-
-rage128_vid is contained within radeon_vid.c. As for a Rage128 framebuffer -
-use the one from your Linux distribution.
-
-Installation:
-~~~~~~~~~~~~~
-
-Simply type two commands in this directory:
-make
-make install
-
-Using with MPlayer:
-~~~~~~~~~~~~~~~~~~~
-
-Currently there is only one way to use ATI's drivers:
-mplayer -vo vesa:lvo:/dev/radeon_vid -<your vesa's options> filename
-or
-mplayer -vo vesa:lvo:/dev/rage128_vid -<your vesa's options> filename
-
-For YV12 formats you can use also:
-mplayer -vo mga:/dev/radeon_vid -<your mga's option> filename
-
-but in this case you should load at least radeonfb driver from
-this package.
-
-Configuring:
-~~~~~~~~~~~~
-
-You can tune some parameters with the following trick:
-echo "parameter=value" > /dev/radeon_vid
-Example (disables adaptive deinterlacing):
-echo "deinterlace=off" > /dev/radeon_vid
-
-To know more about these parameters - try reading the /dev/radeon_vid file ;)
-For example:
-cat /dev/radeon_vid
-
-List of parameters:
-~~~~~~~~~~~~~~~~~~~
-If you have Rage128 chip:
-brightness=decval          (-64:+63) changes brightness
-saturation=decval          (0:+31) changes saturation 0 == grayscale mode
-else - if you have Radeon:
-brightness=decval          (-1000:+1000) -1000 == black screen
-saturation=decval          (-1000:+1000) -1000 == grayscaled mode
-contrast=decval            (-1000:+1000) -1000 == black screen
-hue=decval                 (-1000:+1000) -1000 == +1000 (full circle)
-                           all other values are within this range
-Note: 0 is the default value for every parameter on Radeons.
-WARNING: This driver violates the rule: "no float in the kernel".
-So if you have problems then don't use color correction.
-
-double_buff=on/off         enables/disables double buffering
-deinterlace=on/off         enables/disables adaptive deinterlacing
-deinterlace_pattern=hexval defines deinterlacing pattern
-
-Driver parameters:
-~~~~~~~~~~~~~~~~~~
-
-You can use some additional parameters during module loading:
-Example:
-modprobe radeon_vid swap_fourcc=1
-
-List of driver parameters:
-~~~~~~~~~~~~~~~~~~~~~~~~~~
-mtrr=1/0                   Configures MTRR (if available), default = 1.
-swap_fourcc=1/0            Performs byte swapping of passed fourcc.
-			   (It's required for compatibility with -vo mga.)
-
-To know more about driver parameters execute:
-modinfo radeon_vid
-or
-modinfo rage128_vid
-
-Note:
-~~~~~
-For command line of MPlayer:
-You can pass only options with can be recognized by vo_vesa driver.
-(Indeed radeon_vid and rage128_vid are stupid things and can only create
-video overlay. Mode switching and other adjustments are performed by the
-vo_vesa driver. This mean that they use the VESA BIOS as graphics server.)
-
-Conclusion:
-~~~~~~~~~~~
-This stuff (radeon(rage128)_vid) currently doesn't support any standards.
-
-Full example:
-~~~~~~~~~~~~~
-modprobe radeon_vid mtrr=1
-echo "deinterlace_pattern=F0055555" > /dev/radeon_vid
-mplayer -vo vesa:lvo:/dev/radeon_vid -fs -zoom -bpp 32 filename
-
-Enjoy!
diff --git a/drivers/radeon/generic_math.h b/drivers/radeon/generic_math.h
deleted file mode 100644
index 459cf2a276..0000000000
--- a/drivers/radeon/generic_math.h
+++ /dev/null
@@ -1,258 +0,0 @@
-/*
-   generic implementation of sin(x) and cos(x) functions.
-   Specially for Linux.
-   Licence: GPL
-   Copyright (C) 2002 Nick Kurshev
-*/
-
-#ifndef GENERIC_MATH_H
-#define GENERIC_MATH_H
-
-typedef struct _gen_sincos
-{
-  double x;
-  double sinx;
-  double cosx;
-}gen_sincos_t;
-
-static gen_sincos_t g_sincos[201] = {
-{ -3.141600e+00, 7.346410e-06, -1.000000e-00 },
-{ -3.110184e+00, -3.140349e-02, -9.995068e-01 },
-{ -3.078768e+00, -6.278333e-02, -9.980272e-01 },
-{ -3.047352e+00, -9.410122e-02, -9.955626e-01 },
-{ -3.015936e+00, -1.253262e-01, -9.921156e-01 },
-{ -2.984520e+00, -1.564276e-01, -9.876894e-01 },
-{ -2.953104e+00, -1.873745e-01, -9.822885e-01 },
-{ -2.921688e+00, -2.181366e-01, -9.759183e-01 },
-{ -2.890272e+00, -2.486833e-01, -9.685848e-01 },
-{ -2.858856e+00, -2.789847e-01, -9.602956e-01 },
-{ -2.827440e+00, -3.090107e-01, -9.510586e-01 },
-{ -2.796024e+00, -3.387318e-01, -9.408830e-01 },
-{ -2.764608e+00, -3.681185e-01, -9.297789e-01 },
-{ -2.733192e+00, -3.971420e-01, -9.177572e-01 },
-{ -2.701776e+00, -4.257736e-01, -9.048297e-01 },
-{ -2.670360e+00, -4.539849e-01, -8.910094e-01 },
-{ -2.638944e+00, -4.817483e-01, -8.763097e-01 },
-{ -2.607528e+00, -5.090362e-01, -8.607451e-01 },
-{ -2.576112e+00, -5.358217e-01, -8.443312e-01 },
-{ -2.544696e+00, -5.620785e-01, -8.270839e-01 },
-{ -2.513280e+00, -5.877805e-01, -8.090204e-01 },
-{ -2.481864e+00, -6.129025e-01, -7.901586e-01 },
-{ -2.450448e+00, -6.374196e-01, -7.705169e-01 },
-{ -2.419032e+00, -6.613076e-01, -7.501148e-01 },
-{ -2.387616e+00, -6.845430e-01, -7.289724e-01 },
-{ -2.356200e+00, -7.071029e-01, -7.071107e-01 },
-{ -2.324784e+00, -7.289649e-01, -6.845511e-01 },
-{ -2.293368e+00, -7.501075e-01, -6.613159e-01 },
-{ -2.261952e+00, -7.705099e-01, -6.374281e-01 },
-{ -2.230536e+00, -7.901518e-01, -6.129112e-01 },
-{ -2.199120e+00, -8.090140e-01, -5.877894e-01 },
-{ -2.167704e+00, -8.270777e-01, -5.620876e-01 },
-{ -2.136288e+00, -8.443252e-01, -5.358310e-01 },
-{ -2.104872e+00, -8.607395e-01, -5.090457e-01 },
-{ -2.073456e+00, -8.763043e-01, -4.817579e-01 },
-{ -2.042040e+00, -8.910044e-01, -4.539948e-01 },
-{ -2.010624e+00, -9.048251e-01, -4.257835e-01 },
-{ -1.979208e+00, -9.177528e-01, -3.971521e-01 },
-{ -1.947792e+00, -9.297748e-01, -3.681288e-01 },
-{ -1.916376e+00, -9.408793e-01, -3.387421e-01 },
-{ -1.884960e+00, -9.510552e-01, -3.090212e-01 },
-{ -1.853544e+00, -9.602925e-01, -2.789953e-01 },
-{ -1.822128e+00, -9.685821e-01, -2.486940e-01 },
-{ -1.790712e+00, -9.759158e-01, -2.181473e-01 },
-{ -1.759296e+00, -9.822865e-01, -1.873854e-01 },
-{ -1.727880e+00, -9.876877e-01, -1.564385e-01 },
-{ -1.696464e+00, -9.921142e-01, -1.253372e-01 },
-{ -1.665048e+00, -9.955616e-01, -9.411219e-02 },
-{ -1.633632e+00, -9.980265e-01, -6.279433e-02 },
-{ -1.602216e+00, -9.995064e-01, -3.141450e-02 },
-{ -1.570800e+00, -1.000000e-00, -3.673205e-06 },
-{ -1.539384e+00, -9.995067e-01, 3.140716e-02 },
-{ -1.507968e+00, -9.980269e-01, 6.278700e-02 },
-{ -1.476552e+00, -9.955623e-01, 9.410488e-02 },
-{ -1.445136e+00, -9.921151e-01, 1.253299e-01 },
-{ -1.413720e+00, -9.876889e-01, 1.564312e-01 },
-{ -1.382304e+00, -9.822879e-01, 1.873781e-01 },
-{ -1.350888e+00, -9.759175e-01, 2.181402e-01 },
-{ -1.319472e+00, -9.685839e-01, 2.486869e-01 },
-{ -1.288056e+00, -9.602945e-01, 2.789882e-01 },
-{ -1.256640e+00, -9.510574e-01, 3.090142e-01 },
-{ -1.225224e+00, -9.408817e-01, 3.387352e-01 },
-{ -1.193808e+00, -9.297775e-01, 3.681220e-01 },
-{ -1.162392e+00, -9.177557e-01, 3.971454e-01 },
-{ -1.130976e+00, -9.048282e-01, 4.257769e-01 },
-{ -1.099560e+00, -8.910077e-01, 4.539882e-01 },
-{ -1.068144e+00, -8.763079e-01, 4.817515e-01 },
-{ -1.036728e+00, -8.607433e-01, 5.090393e-01 },
-{ -1.005312e+00, -8.443292e-01, 5.358248e-01 },
-{ -9.738960e-01, -8.270819e-01, 5.620815e-01 },
-{ -9.424800e-01, -8.090183e-01, 5.877835e-01 },
-{ -9.110640e-01, -7.901563e-01, 6.129054e-01 },
-{ -8.796480e-01, -7.705146e-01, 6.374224e-01 },
-{ -8.482320e-01, -7.501124e-01, 6.613104e-01 },
-{ -8.168160e-01, -7.289699e-01, 6.845457e-01 },
-{ -7.854000e-01, -7.071081e-01, 7.071055e-01 },
-{ -7.539840e-01, -6.845484e-01, 7.289674e-01 },
-{ -7.225680e-01, -6.613131e-01, 7.501100e-01 },
-{ -6.911520e-01, -6.374252e-01, 7.705122e-01 },
-{ -6.597360e-01, -6.129083e-01, 7.901541e-01 },
-{ -6.283200e-01, -5.877864e-01, 8.090161e-01 },
-{ -5.969040e-01, -5.620845e-01, 8.270798e-01 },
-{ -5.654880e-01, -5.358279e-01, 8.443272e-01 },
-{ -5.340720e-01, -5.090425e-01, 8.607414e-01 },
-{ -5.026560e-01, -4.817547e-01, 8.763061e-01 },
-{ -4.712400e-01, -4.539915e-01, 8.910060e-01 },
-{ -4.398240e-01, -4.257802e-01, 9.048266e-01 },
-{ -4.084080e-01, -3.971488e-01, 9.177542e-01 },
-{ -3.769920e-01, -3.681254e-01, 9.297762e-01 },
-{ -3.455760e-01, -3.387387e-01, 9.408805e-01 },
-{ -3.141600e-01, -3.090177e-01, 9.510563e-01 },
-{ -2.827440e-01, -2.789917e-01, 9.602935e-01 },
-{ -2.513280e-01, -2.486905e-01, 9.685830e-01 },
-{ -2.199120e-01, -2.181437e-01, 9.759166e-01 },
-{ -1.884960e-01, -1.873817e-01, 9.822872e-01 },
-{ -1.570800e-01, -1.564348e-01, 9.876883e-01 },
-{ -1.256640e-01, -1.253335e-01, 9.921147e-01 },
-{ -9.424800e-02, -9.410853e-02, 9.955619e-01 },
-{ -6.283200e-02, -6.279067e-02, 9.980267e-01 },
-{ -3.141600e-02, -3.141083e-02, 9.995066e-01 },
-{ 0.000000e+00, 0.000000e+00, 1.000000e+00 },
-{ 3.141600e-02, 3.141083e-02, 9.995066e-01 },
-{ 6.283200e-02, 6.279067e-02, 9.980267e-01 },
-{ 9.424800e-02, 9.410853e-02, 9.955619e-01 },
-{ 1.256640e-01, 1.253335e-01, 9.921147e-01 },
-{ 1.570800e-01, 1.564348e-01, 9.876883e-01 },
-{ 1.884960e-01, 1.873817e-01, 9.822872e-01 },
-{ 2.199120e-01, 2.181437e-01, 9.759166e-01 },
-{ 2.513280e-01, 2.486905e-01, 9.685830e-01 },
-{ 2.827440e-01, 2.789917e-01, 9.602935e-01 },
-{ 3.141600e-01, 3.090177e-01, 9.510563e-01 },
-{ 3.455760e-01, 3.387387e-01, 9.408805e-01 },
-{ 3.769920e-01, 3.681254e-01, 9.297762e-01 },
-{ 4.084080e-01, 3.971488e-01, 9.177542e-01 },
-{ 4.398240e-01, 4.257802e-01, 9.048266e-01 },
-{ 4.712400e-01, 4.539915e-01, 8.910060e-01 },
-{ 5.026560e-01, 4.817547e-01, 8.763061e-01 },
-{ 5.340720e-01, 5.090425e-01, 8.607414e-01 },
-{ 5.654880e-01, 5.358279e-01, 8.443272e-01 },
-{ 5.969040e-01, 5.620845e-01, 8.270798e-01 },
-{ 6.283200e-01, 5.877864e-01, 8.090161e-01 },
-{ 6.597360e-01, 6.129083e-01, 7.901541e-01 },
-{ 6.911520e-01, 6.374252e-01, 7.705122e-01 },
-{ 7.225680e-01, 6.613131e-01, 7.501100e-01 },
-{ 7.539840e-01, 6.845484e-01, 7.289674e-01 },
-{ 7.854000e-01, 7.071081e-01, 7.071055e-01 },
-{ 8.168160e-01, 7.289699e-01, 6.845457e-01 },
-{ 8.482320e-01, 7.501124e-01, 6.613104e-01 },
-{ 8.796480e-01, 7.705146e-01, 6.374224e-01 },
-{ 9.110640e-01, 7.901563e-01, 6.129054e-01 },
-{ 9.424800e-01, 8.090183e-01, 5.877835e-01 },
-{ 9.738960e-01, 8.270819e-01, 5.620815e-01 },
-{ 1.005312e+00, 8.443292e-01, 5.358248e-01 },
-{ 1.036728e+00, 8.607433e-01, 5.090393e-01 },
-{ 1.068144e+00, 8.763079e-01, 4.817515e-01 },
-{ 1.099560e+00, 8.910077e-01, 4.539882e-01 },
-{ 1.130976e+00, 9.048282e-01, 4.257769e-01 },
-{ 1.162392e+00, 9.177557e-01, 3.971454e-01 },
-{ 1.193808e+00, 9.297775e-01, 3.681220e-01 },
-{ 1.225224e+00, 9.408817e-01, 3.387352e-01 },
-{ 1.256640e+00, 9.510574e-01, 3.090142e-01 },
-{ 1.288056e+00, 9.602945e-01, 2.789882e-01 },
-{ 1.319472e+00, 9.685839e-01, 2.486869e-01 },
-{ 1.350888e+00, 9.759175e-01, 2.181402e-01 },
-{ 1.382304e+00, 9.822879e-01, 1.873781e-01 },
-{ 1.413720e+00, 9.876889e-01, 1.564312e-01 },
-{ 1.445136e+00, 9.921151e-01, 1.253299e-01 },
-{ 1.476552e+00, 9.955623e-01, 9.410488e-02 },
-{ 1.507968e+00, 9.980269e-01, 6.278700e-02 },
-{ 1.539384e+00, 9.995067e-01, 3.140716e-02 },
-{ 1.570800e+00, 1.000000e-00, -3.673205e-06 },
-{ 1.602216e+00, 9.995064e-01, -3.141450e-02 },
-{ 1.633632e+00, 9.980265e-01, -6.279433e-02 },
-{ 1.665048e+00, 9.955616e-01, -9.411219e-02 },
-{ 1.696464e+00, 9.921142e-01, -1.253372e-01 },
-{ 1.727880e+00, 9.876877e-01, -1.564385e-01 },
-{ 1.759296e+00, 9.822865e-01, -1.873854e-01 },
-{ 1.790712e+00, 9.759158e-01, -2.181473e-01 },
-{ 1.822128e+00, 9.685821e-01, -2.486940e-01 },
-{ 1.853544e+00, 9.602925e-01, -2.789953e-01 },
-{ 1.884960e+00, 9.510552e-01, -3.090212e-01 },
-{ 1.916376e+00, 9.408793e-01, -3.387421e-01 },
-{ 1.947792e+00, 9.297748e-01, -3.681288e-01 },
-{ 1.979208e+00, 9.177528e-01, -3.971521e-01 },
-{ 2.010624e+00, 9.048251e-01, -4.257835e-01 },
-{ 2.042040e+00, 8.910044e-01, -4.539948e-01 },
-{ 2.073456e+00, 8.763043e-01, -4.817579e-01 },
-{ 2.104872e+00, 8.607395e-01, -5.090457e-01 },
-{ 2.136288e+00, 8.443252e-01, -5.358310e-01 },
-{ 2.167704e+00, 8.270777e-01, -5.620876e-01 },
-{ 2.199120e+00, 8.090140e-01, -5.877894e-01 },
-{ 2.230536e+00, 7.901518e-01, -6.129112e-01 },
-{ 2.261952e+00, 7.705099e-01, -6.374281e-01 },
-{ 2.293368e+00, 7.501075e-01, -6.613159e-01 },
-{ 2.324784e+00, 7.289649e-01, -6.845511e-01 },
-{ 2.356200e+00, 7.071029e-01, -7.071107e-01 },
-{ 2.387616e+00, 6.845430e-01, -7.289724e-01 },
-{ 2.419032e+00, 6.613076e-01, -7.501148e-01 },
-{ 2.450448e+00, 6.374196e-01, -7.705169e-01 },
-{ 2.481864e+00, 6.129025e-01, -7.901586e-01 },
-{ 2.513280e+00, 5.877805e-01, -8.090204e-01 },
-{ 2.544696e+00, 5.620785e-01, -8.270839e-01 },
-{ 2.576112e+00, 5.358217e-01, -8.443312e-01 },
-{ 2.607528e+00, 5.090362e-01, -8.607451e-01 },
-{ 2.638944e+00, 4.817483e-01, -8.763097e-01 },
-{ 2.670360e+00, 4.539849e-01, -8.910094e-01 },
-{ 2.701776e+00, 4.257736e-01, -9.048297e-01 },
-{ 2.733192e+00, 3.971420e-01, -9.177572e-01 },
-{ 2.764608e+00, 3.681185e-01, -9.297789e-01 },
-{ 2.796024e+00, 3.387318e-01, -9.408830e-01 },
-{ 2.827440e+00, 3.090107e-01, -9.510586e-01 },
-{ 2.858856e+00, 2.789847e-01, -9.602956e-01 },
-{ 2.890272e+00, 2.486833e-01, -9.685848e-01 },
-{ 2.921688e+00, 2.181366e-01, -9.759183e-01 },
-{ 2.953104e+00, 1.873745e-01, -9.822885e-01 },
-{ 2.984520e+00, 1.564276e-01, -9.876894e-01 },
-{ 3.015936e+00, 1.253262e-01, -9.921156e-01 },
-{ 3.047352e+00, 9.410122e-02, -9.955626e-01 },
-{ 3.078768e+00, 6.278333e-02, -9.980272e-01 },
-{ 3.110184e+00, 3.140349e-02, -9.995068e-01 },
-{ 3.141600e+00, -7.346410e-06, -1.000000e-00 }
-};
-
-# define M_PI		3.14159265358979323846	/* pi */
-
-static double inline gen_sin(double x)
-{
-  int i;
-  if(x < 0) while(x < -M_PI) x+= M_PI;
-  else      while(x > M_PI) x-= M_PI;
-  for(i=0;i<sizeof(g_sincos)/sizeof(gen_sincos_t)-1;i++)
-  {
-    if(x>=g_sincos[i].x && x <= g_sincos[i+1].x)
-    {
-      return (g_sincos[i+1].sinx-g_sincos[i].sinx)*(x-g_sincos[i].x)/(g_sincos[i+1].x-g_sincos[i].x)+g_sincos[i].sinx;
-    }
-  }
-  return x<0?1:-1;
-}
-#undef sin
-#define sin(x) gen_sin(x)
-
-static double inline gen_cos(double x)
-{
-  int i;
-  if(x < 0) while(x < -M_PI) x+= M_PI;
-  else      while(x > M_PI) x-= M_PI;
-  for(i=0;i<sizeof(g_sincos)/sizeof(gen_sincos_t)-1;i++)
-  {
-    if(x>=g_sincos[i].x && x <= g_sincos[i+1].x)
-    {
-      return (g_sincos[i+1].cosx-g_sincos[i].cosx)*(x-g_sincos[i].x)/(g_sincos[i+1].x-g_sincos[i].x)+g_sincos[i].cosx;
-    }
-  }
-  return x<0?1:-1;
-}
-#undef cos
-#define cos(x) gen_cos(x)
-
-#endif
\ No newline at end of file
diff --git a/drivers/radeon/hacking b/drivers/radeon/hacking
deleted file mode 100644
index 345c183608..0000000000
--- a/drivers/radeon/hacking
+++ /dev/null
@@ -1,313 +0,0 @@
-                       ATI chips hacking
-                       =================
-						Dedicated to ATI's hackers.
-
-Preface
-~~~~~~~
-This document will compare ATI chips only from point of DAC and video overlay.
-There are lots of difference from 3D point, dual-head support, tv-out support
-and many other things but it's already perfectly different story.
-This document doesn't include information about ATI AIW (All In Wonder) chips.
-
-What are units on modern ATI chips:
-DAC   - (Digital to Analog Convertor) controls CRTC, LCD, DFP monitor's output
-	Consists from:
-		PLL  - (Programable line length) registers
-		CRTC - CRT controller
-		LCD/DFP scaler
-		surface control
-DAC2  - controls CRTC, LCD, DFP monitor's output on second head
-TVDAC - controls Composite Video and Super Video output ports
-	Consists from:
-		TV_PLL
-		TV scaler & sync unit
-		TV format convertor (PAL/NTSC)
-TVCAP - controls Video-In port
-MPP   - Miscellaneous peripheral port. (includes macrovision's filter - copy
-	protection mechanism)
-OV    - Video overlay (YUV BES) (include subpictures, gamma correction and
-        adaptive deinterlacing)
-CAP0  - Video capturing 
-CAP1  - Video capturing (second unit)
-RT    - Rage theatre: video encoding and mixing
-MUX   - video muxer
-MEM   - PCI/AGP bus mastering
-2D    - GUI engine
-3D    - 3D-OpenGL engine (There are lots of stuff)
-I2C   - I2C Bus control
-
-This document is mainly related only with OV unit ;)
-Video decoding diagram:
-
-RAM memory:   [ App ]    Copies YUV image to overlay memory
-                 |       <-- (It's possible to program DMA here)
-overlay memory:[ OV ]    performs scaling and YUVtoRGB convertion
-                /\
-RGB memory:   /    \
-            /  [ macrovision ]  performs copy protection filtering
-          /            \        (unneeded but presented by default thing;)
- [ CRTC/LCD/DFP DAC ] [ TV DAC ] convert RGB memory to CRTC and NTSC/PAL signals
-          |                |
- [CRTC/LCD/DFP Monitor] [TV-screen]
-
-History
-~~~~~~~
-  What is history of ATI's chips? I can be wrong but below is my vision
-of this question:
-
-0. I don't know any earlied chips :(
-1. Mach8
-2. Mach16
-3. Mach32
-
-4. Mach64.
-	It's first chip which has support from side of open
-	source drivers. Set of mach64 chips is:
-		mach64GX (ATI888GX00)
-		mach64CX (ATI888CX00)
-		mach64CT (ATI264CT)
-		mach64ET (ATI264ET)
-		mach64VTA3 (ATI264VT)
-		mach64VTA4 (ATI264VT)
-		mach64VTB (ATI264VTB)
-		mach64VT4 (ATI264VT4)
-
-5. 3D rage chips.
-	It seems that these chips have fully compatible by GPU with Mach64
-	which is extended by 3D possibilities. Set of 3D rage chips is:
-		3D RAGE (GT)
-		3D RAGE II+ (GTB)
-		3D RAGE IIC (PCI)
-		3D RAGE IIC (AGP)
-		3D RAGE LT
-		3D RAGE LT-G
-		3D RAGE PRO (BGA, AGP)
-		3D RAGE PRO (BGA, AGP, 1x only)
-		3D RAGE PRO (BGA, PCI)
-		3D RAGE PRO (PQFP, PCI)
-		3D RAGE PRO (PQFP, PCI, limited 3D)
-		3D RAGE (XL)
-		3D RAGE LT PRO (AGP)
-		3D RAGE LT PRO (PCI)
-		3D RAGE Mobility (PCI)
-		3D RAGE Mobility (AGP)
-
-6. Rage128 chips.
-	These chips have perfectly new GPU which supports memory mapped IO
-	space for accelerating port access (It's main cause of incompatibility
-	with mach64). Set of Rage128 chips is:
-		Rage128 GL RE
-		Rage128 GL RF
-		Rage128 GL RG
-		Rage128 GL RH
-		Rage128 GL RI
-		Rage128 VR RK
-		Rage128 VR RL
-		Rage128 VR RM
-		Rage128 VR RN
-		Rage128 VR RO
-		Rage128 Mobility M3 LE
-		Rage128 Mobility M3 LF
-7. Rage128Pro chips.
-	These chips are successors of Rage128 ones.
-		Rage128Pro GL PA
-		Rage128Pro GL PB
-		Rage128Pro GL PC
-		Rage128Pro GL PD
-		Rage128Pro GL PE
-		Rage128Pro GL PF
-		Rage128Pro VR PG
-		Rage128Pro VR PH
-		Rage128Pro VR PI
-		Rage128Pro VR PJ
-		Rage128Pro VR PK
-		Rage128Pro VR PL
-		Rage128Pro VR PM
-		Rage128Pro VR PN
-		Rage128Pro VR PO
-		Rage128Pro VR PP
-		Rage128Pro VR PQ
-		Rage128Pro VR PR
-		Rage128Pro VR TR
-		Rage128Pro VR PS
-		Rage128Pro VR PT
-		Rage128Pro VR PU
-		Rage128Pro VR PV
-		Rage128Pro VR PW
-		Rage128Pro VR PX
-		Rage128Pro Ultra U1
-		Rage128Pro Ultra U2
-		Rage128Pro Ultra U3
-
-8. Radeon chips.
-	Indeed they could be named Rage256 Pro. (With minor changes is fully
-	compatible with Rage128 chips).
-		Radeon QD
-		Radeon QE
-		Radeon QF
-		Radeon QG
-		Radeon VE QY
-		Radeon VE QZ
-		Radeon M6 LY
-		Radeon M6 LZ
-		Radeon M7 LW
-9. Radeon2 chips.
-	Indeed they could be named Rage512 Pro.
-		Radeon2 8500 QL
-		Radeon2 7500 QW
-
-10. Radeon3 and newest are cooming soon, but I hope that they will be fully
-    compatible with Radeon1 chips.
-
-In Radeon famility there were introduced also FX chips: Radeon FX and
-Radeon2 8700 FX. Probably they have the same possibility as other Radeon
-but currently it's unknown for me.
-
-What about video overlay and DAC?
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-
-Currently it's known that there is only difference between
-Mach64 and Rage128 compatible chips:
-- They have different logic of io ports programming!
-- They are incompatible by port numbers!
-But:
-- They use the same program logic from register's name point.
-(Indeed exists slight difference even between Radeon and Rage128
-chips. AFAIK only Radeon has OV0_SLICE_CNTL register which currently
-is not used by driver. But I know only its name ;). Also there
-is difference in slight adjust of BES position but it's configured
-by #ifdef blocks).
-
-Please compare:
-
-(The piece of Back-End Scaler programming)
-
- Sample for Mach64 compatible chips:
- ***********************************
-
-#define SPARSE_IO_BASE		0x03fcu
-#define SPARSE_IO_SELECT	0xfc00u
-
-#define BLOCK_IO_BASE		0xff00u
-#define BLOCK_IO_SELECT		0x00fcu
-
-#define MM_IO_SELECT		0x03fcu
-#define BLOCK_SELECT		0x0400u
-#define DWORD_SELECT		(BLOCK_SELECT | MM_IO_SELECT)
-
-#define IO_BYTE_SELECT		0x0003u
-
-#define SPARSE_IO_PORT		(SPARSE_IO_BASE | IO_BYTE_SELECT)
-#define BLOCK_IO_PORT		(BLOCK_IO_BASE | IO_BYTE_SELECT)
-
-#define IOPortTag(_SparseIOSelect, _BlockIOSelect)	\
-	(SetBits(_SparseIOSelect, SPARSE_IO_SELECT) |	\
-	 SetBits(_BlockIOSelect, BLOCK_SELECT | MM_IO_SELECT))
-#define SparseIOTag(_IOSelect)	IOPortTag(_IOSelect, 0)
-#define BlockIOTag(_IOSelect)	IOPortTag(0, _IOSelect)
-
-...
-
-#define OVERLAY_Y_X_START	BlockIOTag(0x100u)
-#define OVERLAY_Y_X_END		BlockIOTag(0x101u)
-
-...
-
-#define OUTREG(_Register, _Value)                              \
-    MMIO_OUT32(pATI->pBlock[GetBits(_Register, BLOCK_SELECT)], \
-               (_Register) & MM_IO_SELECT, _Value)
-
-...
-
-OUTREG(OVERLAY_Y_X_START,((drw_x)<<16)|(drw_y)|(1<<31));
-OUTREG(OVERLAY_Y_X_END,((drw_x+drw_w)<<16)|(drw_y+drw_h));
-
-
- Sample for Rage128 compatible chips:
- ************************************
-
-#define OV0_Y_X_START                          0x0400
-#define OV0_Y_X_END                            0x0404  
-
-...
-
-#define INREG(addr)		readl((rage_mmio_base)+addr)
-#define OUTREG(addr,val)	writel(val, (rage_mmio_base)+addr)
-
-...
-
-rage_mmio_base = ioremap_nocache(pci_resource_start (dev, 2),RAGE_REGSIZE);
-
-...
-
-#ifdef RADEON
-#define X_ADJUST 8
-#else /* rage128 */
-#define X_ADJUST 0
-#endif
-
-OUTREG(OV0_Y_X_START,(drw_x+X_ADJUST)|(drw_y<<16));
-OUTREG(OV0_Y_X_END,(drw_x+drw_w+X_ADJUST)|(drw_y+drw_h)<<16));
-
-Thus - these chips have almost the same logic from register's name point.
-(except the fact that they have swapped 16-bit halfs).
-Yes - programming of Rage128 is much simpler of Mach64.
-
-
-What about other ATI's chips?
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-
-I suggest you have latest copy of GATOS-CVS:
-http://www.linuxvideo.org
-GATOS was designed and introduced as General ATI TV and Overlay Sowfware.
-You will be able to find out there a lots of useful hacking utilities
-(at location gatos-ati/gatos):
-gfxdump - Program for dumping graphics chips registers on Linux and Windows 9X.
-	  (it's more useful for Win9x to hack their values).
-xatitv  - For working with tv-in (currently is under hard development)
-atitvout- For working with tv-out
-and lot of other stuff.
-BUT: After studing of Gatos and X11 stuffs I've found that they are bad
-optimized for movie playback.
-Please compare:
- radeon_vid - configures video overlay only once and provides DGA to it.
-	      (doesn't require to be MMX optimized)
- gatos and X11 - configures video overlay at every slice of frame, then
-              performs unoptimized copying of source stuff to video memory
-	      often with using CopyMungedData (it's C-analog of YV12_to_YUY2)
-	      since there are lacks in yv12 support.
-              (is not MMX optimized that's gladly accepted, but probably
-               will be never optimized due portability).
-
-hardware IDCT support diagram:
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-                                      |
-[ Video parser ] <---------- [ Transport demuxing ] --> [ Audio ]
-       |                                |       |
-[ Variable length decoder]              |D      |
-       |                                |V      |
-[ Inverse quantization ]                |D      |
-       |                                |       |
--------|---[ video card ]---------+     |s      |
-       |                          |     |u      |
-[ Run level decode & de-zigzag ]  |     |b      |
-       |                          |     |p      |
-[    IDCT   ]                     |     |i      |
-       |                          |     |c      |
-[  Motion compensation  ]         |     |t      |
-       |                          |     |u      |
-[ Advanced deinterlacing ]        |     |r      |
-       |                          |     |e      |
-[ Filtered X-Y scaling ] [SUBPIC]-|-----+s   [ OSD ]
-       |                     |    |     |       |
-[ 4-bit alpha blending ] <---+    |     +-------+
-       |                          |
-[ YUV to RGB conversion ]         |
--------|--------------------------+
-TV-screen or CRT-display
-
-
-Conslusion:
-~~~~~~~~~~~
-
-That's all folk!
diff --git a/drivers/radeon/radeon.h b/drivers/radeon/radeon.h
deleted file mode 100644
index 764e491c00..0000000000
--- a/drivers/radeon/radeon.h
+++ /dev/null
@@ -1,2046 +0,0 @@
-/*
- * radeon.h
- * This	software has been released under the terms of the GNU Public
- * license. See	http://www.gnu.org/copyleft/gpl.html for details.
- *
- * This	collection of definition was written by	Nick Kurshev
- * It's	based on radeonfb, X11,	GATOS sources
- * and partly compatible with Rage128 set (in OV0, CAP0, CAP1 parts)
-*/
-
-#ifndef	_RADEON_H
-#define	_RADEON_H
-
-
-/* radeon PCI ids */
-#define	PCI_DEVICE_ID_RADEON_QD		0x5144
-#define	PCI_DEVICE_ID_RADEON_QE		0x5145
-#define	PCI_DEVICE_ID_RADEON_QF		0x5146
-#define	PCI_DEVICE_ID_RADEON_QG		0x5147
-#define	PCI_DEVICE_ID_RADEON_QY		0x5159
-#define	PCI_DEVICE_ID_RADEON_QZ		0x515A
-#define	PCI_DEVICE_ID_RADEON_LY		0x4C59
-#define	PCI_DEVICE_ID_RADEON_LZ		0x4C5A
-#define	PCI_DEVICE_ID_RADEON_LW		0x4C57
-#define	PCI_DEVICE_ID_R200_QL		0x514C
-#define	PCI_DEVICE_ID_RV200_QW		0x5157
-#define	PCI_DEVICE_ID_R200_BB		0x4242
-
-#define	RADEON_REGSIZE			0x4000
-
-
-#define	MM_INDEX			0x0000
-/* MM_INDEX bit	constants */
-#	define MM_APER				0x80000000
-#define	MM_DATA					0x0004
-#define	BUS_CNTL				0x0030
-/* BUS_CNTL bit	constants */
-#	define BUS_DBL_RESYNC			0x00000001
-#	define BUS_MSTR_RESET			0x00000002
-#	define BUS_FLUSH_BUF			0x00000004
-#	define BUS_STOP_REQ_DIS			0x00000008
-#	define BUS_ROTATION_DIS			0x00000010
-#	define BUS_MASTER_DIS			0x00000040
-#	define BUS_ROM_WRT_EN			0x00000080
-#	define BUS_DIS_ROM			0x00001000
-#	define BUS_PCI_READ_RETRY_EN		0x00002000
-#	define BUS_AGP_AD_STEPPING_EN		0x00004000
-#	define BUS_PCI_WRT_RETRY_EN		0x00008000
-#	define BUS_MSTR_RD_MULT			0x00100000
-#	define BUS_MSTR_RD_LINE			0x00200000
-#	define BUS_SUSPEND			0x00400000
-#	define LAT_16X				0x00800000
-#	define BUS_RD_DISCARD_EN		0x01000000
-#	define BUS_RD_ABORT_EN			0x02000000
-#	define BUS_MSTR_WS			0x04000000
-#	define BUS_PARKING_DIS			0x08000000
-#	define BUS_MSTR_DISCONNECT_EN		0x10000000
-#	define BUS_WRT_BURST			0x20000000
-#	define BUS_READ_BURST			0x40000000
-#	define BUS_RDY_READ_DLY			0x80000000
-#define	HI_STAT					0x004C
-#define	BUS_CNTL1				0x0034
-#	define BUS_WAIT_ON_LOCK_EN		(1 << 4)
-#define	I2C_CNTL_0				0x0090
-#	define I2C_DONE				(1<<0)
-#	define I2C_NACK				(1<<1)
-#	define I2C_HALT				(1<<2)
-#	define I2C_SOFT_RST			(1<<5)
-#	define I2C_DRIVE_EN			(1<<6)
-#	define I2C_DRIVE_SEL			(1<<7)
-#	define I2C_START			(1<<8)
-#	define I2C_STOP				(1<<9)
-#	define I2C_RECEIVE			(1<<10)
-#	define I2C_ABORT			(1<<11)
-#	define I2C_GO				(1<<12)
-#	define I2C_SEL				(1<<16)
-#	define I2C_EN				(1<<17)
-#define	I2C_CNTL_1				0x0094
-#define	I2C_DATA				0x0098
-#define	CONFIG_CNTL				0x00E0
-/* CONFIG_CNTL bit constants */
-#	define CFG_VGA_RAM_EN			0x00000100
-#define	CONFIG_MEMSIZE				0x00F8
-#define	CONFIG_APER_0_BASE			0x0100
-#define	CONFIG_APER_1_BASE			0x0104
-#define	CONFIG_APER_SIZE			0x0108
-#define	CONFIG_REG_1_BASE			0x010C
-#define	CONFIG_REG_APER_SIZE			0x0110
-#define	PAD_AGPINPUT_DELAY			0x0164
-#define	PAD_CTLR_STRENGTH			0x0168
-#define	PAD_CTLR_UPDATE				0x016C
-#define	AGP_CNTL				0x0174
-#	define AGP_APER_SIZE_256MB		(0x00 << 0)
-#	define AGP_APER_SIZE_128MB		(0x20 << 0)
-#	define AGP_APER_SIZE_64MB		(0x30 << 0)
-#	define AGP_APER_SIZE_32MB		(0x38 << 0)
-#	define AGP_APER_SIZE_16MB		(0x3c << 0)
-#	define AGP_APER_SIZE_8MB		(0x3e << 0)
-#	define AGP_APER_SIZE_4MB		(0x3f << 0)
-#	define AGP_APER_SIZE_MASK		(0x3f << 0)
-#define	AMCGPIO_A_REG				0x01a0
-#define	AMCGPIO_EN_REG				0x01a8
-#define	AMCGPIO_MASK				0x0194
-#define	AMCGPIO_Y_REG				0x01a4
-#define	BM_STATUS				0x0160
-#define	MPP_TB_CONFIG				0x01c0 /* ? */
-#define	MPP_GP_CONFIG				0x01c8 /* ? */
-#define	VENDOR_ID				0x0F00
-#define	DEVICE_ID				0x0F02
-#define	COMMAND					0x0F04
-#define	STATUS					0x0F06
-#define	REVISION_ID				0x0F08
-#define	REGPROG_INF				0x0F09
-#define	SUB_CLASS				0x0F0A
-#define	CACHE_LINE				0x0F0C
-#define	LATENCY					0x0F0D
-#define	HEADER					0x0F0E
-#define	BIST					0x0F0F
-#define	REG_MEM_BASE				0x0F10
-#define	REG_IO_BASE				0x0F14
-#define	REG_REG_BASE				0x0F18
-#define	ADAPTER_ID				0x0F2C
-#define	BIOS_ROM				0x0F30
-#define	CAPABILITIES_PTR			0x0F34
-#define	INTERRUPT_LINE				0x0F3C
-#define	INTERRUPT_PIN				0x0F3D
-#define	MIN_GRANT				0x0F3E
-#define	MAX_LATENCY				0x0F3F
-#define	ADAPTER_ID_W				0x0F4C
-#define	PMI_CAP_ID				0x0F50
-#define	PMI_NXT_CAP_PTR				0x0F51
-#define	PMI_PMC_REG				0x0F52
-#define	PM_STATUS				0x0F54
-#define	PMI_DATA				0x0F57
-#define	AGP_CAP_ID				0x0F58
-#define	AGP_STATUS				0x0F5C
-#	define AGP_1X_MODE			0x01
-#	define AGP_2X_MODE			0x02
-#	define AGP_4X_MODE			0x04
-#	define AGP_MODE_MASK			0x07
-#define	AGP_COMMAND				0x0F60
-
-/* Video muxer unit */
-#define VIDEOMUX_CNTL				0x0190
-#define VIPPAD_MASK				0x0198
-#define VIPPAD1_A				0x01AC
-#define VIPPAD1_EN				0x01B0
-#define VIPPAD1_Y				0x01B4
-
-#define	AIC_CTRL				0x01D0
-#define	AIC_STAT				0x01D4
-#define	AIC_PT_BASE				0x01D8
-#define	AIC_LO_ADDR				0x01DC
-#define	AIC_HI_ADDR				0x01E0
-#define	AIC_TLB_ADDR				0x01E4
-#define	AIC_TLB_DATA				0x01E8
-#define	DAC_CNTL				0x0058
-/* DAC_CNTL bit	constants */
-#	define DAC_8BIT_EN			0x00000100
-#	define DAC_4BPP_PIX_ORDER		0x00000200
-#	define DAC_CRC_EN			0x00080000
-#	define DAC_MASK_ALL			(0xff << 24)
-#	define DAC_VGA_ADR_EN			(1 << 13)
-#	define DAC_RANGE_CNTL			(3 << 0)
-#	define DAC_BLANKING			(1 << 2)
-#define	DAC_CNTL2				0x007c
-/* DAC_CNTL2 bit constants */
-#	define DAC2_DAC_CLK_SEL			(1 <<  0)
-#	define DAC2_DAC2_CLK_SEL		(1 <<  1)
-#	define DAC2_PALETTE_ACC_CTL		(1 <<  5)
-#define	TV_DAC_CNTL				0x088c
-/* TV_DAC_CNTL bit constants */
-#	define TV_DAC_STD_MASK			0x0300
-#	define TV_DAC_RDACPD			(1 <<  24)
-#	define TV_DAC_GDACPD			(1 <<  25)
-#	define TV_DAC_BDACPD			(1 <<  26)
-#define	CRTC_GEN_CNTL				0x0050
-/* CRTC_GEN_CNTL bit constants */
-#	define CRTC_DBL_SCAN_EN			0x00000001
-#	define CRTC_INTERLACE_EN		(1 << 1)
-#	define CRTC_CSYNC_EN			(1 << 4)
-#	define CRTC_CUR_EN			0x00010000
-#	define CRTC_CUR_MODE_MASK		(7 << 17)
-#	define CRTC_ICON_EN			(1 << 20)
-#	define CRTC_EXT_DISP_EN			(1 << 24)
-#	define CRTC_EN				(1 << 25)
-#	define CRTC_DISP_REQ_EN_B		(1 << 26)
-#define	CRTC2_GEN_CNTL				0x03f8
-/* CRTC2_GEN_CNTL bit constants	*/
-#	define CRTC2_DBL_SCAN_EN		(1 <<  0)
-#	define CRTC2_INTERLACE_EN		(1 <<  1)
-#	define CRTC2_SYNC_TRISTAT		(1 <<  4)
-#	define CRTC2_HSYNC_TRISTAT		(1 <<  5)
-#	define CRTC2_VSYNC_TRISTAT		(1 <<  6)
-#	define CRTC2_CRT2_ON			(1 <<  7)
-#	define CRTC2_ICON_EN			(1 << 15)
-#	define CRTC2_CUR_EN			(1 << 16)
-#	define CRTC2_CUR_MODE_MASK		(7 << 20)
-#	define CRTC2_DISP_DIS			(1 << 23)
-#	define CRTC2_EN				(1 << 25)
-#	define CRTC2_DISP_REQ_EN_B		(1 << 26)
-#	define CRTC2_HSYNC_DIS			(1 << 28)
-#	define CRTC2_VSYNC_DIS			(1 << 29)
-#define	MEM_CNTL				0x0140
-/* MEM_CNTL bit	constants */
-#	define MEM_CTLR_STATUS_IDLE		0x00000000
-#	define MEM_CTLR_STATUS_BUSY		0x00100000
-#	define MEM_SEQNCR_STATUS_IDLE		0x00000000
-#	define MEM_SEQNCR_STATUS_BUSY		0x00200000
-#	define MEM_ARBITER_STATUS_IDLE		0x00000000
-#	define MEM_ARBITER_STATUS_BUSY		0x00400000
-#	define MEM_REQ_UNLOCK			0x00000000
-#	define MEM_REQ_LOCK			0x00800000
-#define	EXT_MEM_CNTL				0x0144
-#define	MC_AGP_LOCATION				0x014C
-#define	MEM_IO_CNTL_A0				0x0178
-#define	MEM_INIT_LATENCY_TIMER			0x0154</